From patchwork Wed Sep 26 13:56:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Thierry X-Patchwork-Id: 10616031 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9777E15E8 for ; Wed, 26 Sep 2018 13:58:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 904702A66D for ; Wed, 26 Sep 2018 13:58:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 82D002AF57; Wed, 26 Sep 2018 13:58:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9AEED2AF28 for ; Wed, 26 Sep 2018 13:58:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=yboJNf3UUdto6BXnHJ2ginR1/SRJ+lX1s5S9q1Wvl+w=; b=B9I MiAtwd/kG5O3sc4MISivlpiVGSL7Wl+bdxaSpiL7upecxt1CoGoP1fnDo+BmrsfGEL+x0XDbQRNf5 1j2qxNkyn1x9aC1RKy2Mj8xT8SW1hwQaPPZCxgmKki515DsO3ujy8i8nSy+Pe3AuZYheInDbk9/m5 0SizJTSiLyvBzyprgf8/NcckRkDbTs1sB58jYxOTkVjfS86J8mQXurW9jHa9LGFjc7xIEWLPzewSu xrxjtUhgQzjMOOhnGcfTuj/mJTiWCQl17FQqIveiUK3AMKOEeevzrFqPpS6wuaHJLk76vvF07Ff9W bB/xkuVNC30gzzu6cC7qo/MLIvoCcxA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g5AKC-0007XO-3Q; Wed, 26 Sep 2018 13:57:56 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g5AJM-00076T-97 for linux-arm-kernel@lists.infradead.org; Wed, 26 Sep 2018 13:57:30 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 73D2318A; Wed, 26 Sep 2018 06:56:30 -0700 (PDT) Received: from e112298-lin.Emea.Arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E6C053F5B3; Wed, 26 Sep 2018 06:56:28 -0700 (PDT) From: Julien Thierry To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 0/7] Ensure stack is aligned for kernel entries Date: Wed, 26 Sep 2018 14:56:17 +0100 Message-Id: <1537970184-44348-1-git-send-email-julien.thierry@arm.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180926_065704_357310_78C4F878 X-CRM114-Status: GOOD ( 12.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Julien Thierry , marc.zyngier@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, christoffer.dall@arm.com, james.morse@arm.com, Dave.Martin@arm.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Hi, Having SCTLR_ELx.SA enabled requires the SP to be 16-bytes aligned before using it to access memory. When taking an exception, it is possible that the context during which the exception occured had SP mis-aligned. The entry code needs to make sure that the stack is aligned before using it to save the context. This is only a concern when taking exception from an EL using the same SP_ELx as the handler. In other cases it can be assumed that the SP being picked up on exception entry is aligned under the condition that SP is always aligned when doing eret to an EL using a different SP. On Juno I see a runtime difference <1% for hackbench. If I do not include the fast path at EL1 (patch 4) I see a diff of 1-2%. For EL2 entries, a bit of clean up of stuff getting patched in the vector has been needed. Cheers, Julien --> Julien Thierry (7): arm64: Add static check for pt_regs alignment arm64: sdei: Always use sdei stack for sdei events arm64: Align stack when taking exception from EL1 arm64: Add fast-path for stack alignment arm64: Do not apply BP hardening for hyp entries from EL2 arm64: Do not apply vector harderning for hyp entries from EL2 arm64: kvm: Align stack for exception coming from EL2 arch/arm64/include/asm/assembler.h | 9 +++++ arch/arm64/include/asm/ptrace.h | 2 + arch/arm64/include/asm/sdei.h | 2 - arch/arm64/kernel/cpu_errata.c | 10 ++++- arch/arm64/kernel/entry.S | 43 +++++++++++++++++++-- arch/arm64/kernel/sdei.c | 23 ++++------- arch/arm64/kvm/hyp/hyp-entry.S | 78 +++++++++++++++++++++++++++++++------- drivers/firmware/Kconfig | 1 + 8 files changed, 132 insertions(+), 36 deletions(-) --- 1.9.1