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Wed, 5 Jun 2019 17:16:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1559754970; bh=FdlcBmhv22cQY8wMK0PgQ3r93qrONz476UJE+bJjDO4=; h=From:To:Subject:Date:From; b=cLqKEbMtwDbOXwdDl5cANUaP7t18uBCbMBe4k5vi9oKe/Tm7pAM1uwQUWgomgI7TX m0i+G52gG6GFw3vJCjGbUyodA8b6wDNQFyjG6b/BTOG46yiPZNBmAfriaFsZfecH/K Cs1KlvCAP5UjUe/G7yjje9LlepUmjCfaU9NrMzB4= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 8C14E6063A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sricharan@codeaurora.org From: Sricharan R To: robh+dt@kernel.org, sboyd@codeaurora.org, linus.walleij@linaro.org, agross@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 0/6] Add minimal boot support for IPQ6018 Date: Wed, 5 Jun 2019 22:45:55 +0530 Message-Id: <1559754961-26783-1-git-send-email-sricharan@codeaurora.org> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190605_101612_027020_3549CF2C X-CRM114-Status: GOOD ( 10.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The IPQ6018 is Qualcomm’s 802.11ax SoC for Routers, Gateways and Access Points. This series adds minimal board boot support for ipq6018-cp01 board. Sricharan R (6): pinctrl: qcom: Add ipq6018 pinctrl driver dt-bindings: qcom: Add ipq6018 bindings clk: qcom: Add DT bindings for ipq6018 gcc clock controller clk: qcom: Add ipq6018 Global Clock Controller support arm64: dts: Add ipq6018 SoC and CP01 board support arm64: defconfig: Enable qcom ipq6018 clock and pinctrl Documentation/devicetree/bindings/arm/qcom.yaml | 2 + .../devicetree/bindings/clock/qcom,gcc.txt | 1 + arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 35 + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 231 + arch/arm64/configs/defconfig | 2 + drivers/clk/qcom/Kconfig | 9 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-ipq6018.c | 5267 ++++++++++++++++++++ drivers/pinctrl/qcom/Kconfig | 10 + drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-ipq6018.c | 1183 +++++ include/dt-bindings/clock/qcom,gcc-ipq6018.h | 405 ++ 13 files changed, 7148 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts create mode 100644 arch/arm64/boot/dts/qcom/ipq6018.dtsi create mode 100644 drivers/clk/qcom/gcc-ipq6018.c create mode 100644 drivers/pinctrl/qcom/pinctrl-ipq6018.c create mode 100644 include/dt-bindings/clock/qcom,gcc-ipq6018.h