From patchwork Mon Jul 8 14:32:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Thierry X-Patchwork-Id: 11035209 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A374217D5 for ; Mon, 8 Jul 2019 14:33:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 92EEB28405 for ; Mon, 8 Jul 2019 14:33:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8712228620; Mon, 8 Jul 2019 14:33:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1E536285FD for ; Mon, 8 Jul 2019 14:33:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=q1F9LVoPZO0mCsYBkC3WqIlkzErRHKVoXbCDe/nmqgE=; b=fwM +QzCet8jJ2SrhRsjpKdQccGnw9L5a1kQ6acOlV6oXGcifLQ6XH/GOCIOSgO4vH6coFLXbwS0zRRQ0 SG6pLFPu9hsbEHW2V30EdaaM4PIUIeinbL5vo6+XczfsvwYDoSSLtteUT7k8IPdnPHcjj0YTemJ6h PcHQY1IhWmxtEOmrXGX6cOG1RbGHRweHgo2smAildE/GE97Fj+NWFjLFO9SEGEhcupU+wkATW0UOW 0ibmakmziQqSUrqDzJ7Y7CzubSTSKYV6wxXslvZr7xU2iXTMAJNXuKEAUSa0UUompsuslYhLuqqLg TV7aYH9zVLrzkMBfVnigA3EJq8GxC3g==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hkUha-000130-2Q; Mon, 08 Jul 2019 14:33:10 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hkUhX-000125-3E for linux-arm-kernel@lists.infradead.org; Mon, 08 Jul 2019 14:33:08 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 624652B; Mon, 8 Jul 2019 07:33:06 -0700 (PDT) Received: from e112298-lin.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E630F3F59C; Mon, 8 Jul 2019 07:33:04 -0700 (PDT) From: Julien Thierry To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 0/9] arm_pmu: Use NMI for perf interrupt Date: Mon, 8 Jul 2019 15:32:48 +0100 Message-Id: <1562596377-33196-1-git-send-email-julien.thierry@arm.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190708_073307_179593_04466B11 X-CRM114-Status: GOOD ( 13.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, Julien Thierry , peterz@infradead.org, liwei391@huawei.com, will.deacon@arm.com, acme@kernel.org, alexander.shishkin@linux.intel.com, mingo@redhat.com, namhyung@kernel.org, jolsa@redhat.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Hi, After fixing the arm64 Pseudo-NMIs, I'm dusting off this series. The series makes the arm_pmu driver use NMIs for the perf interrupt when NMIs are available on the platform (currently, only arm64 + GICv3). * Patches 1 to 4 remove the need to use spinlocks for the Arm PMU driver for Armv7 and Armv8 (aarch64). * Patches 5 moves the locking to Armv6 specific code which is the sole user * Patches 6 and 7 make the PMU interrupt handler NMI-safe * Patches 8 and 9 enable using pseudo-NMI for the PMU interrupt when the feature is available Changes since v2[1]: - Rebased on recent linux-next (next-20190708) - Fixed a number of bugs with indices (reported by Wei) - Minor style fixes Changes since v1[2]: - Rebased on v5.1-rc1 - Pseudo-NMI has changed a lot since then, use the (now merged) NMI API - Remove locking from armv7 perf_event - Use locking only in armv6 perf_event - Use direct counter/type registers insted of selector register for armv8 [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2019-March/640536.html [2] http://lists.infradead.org/pipermail/linux-arm-kernel/2018-January/554611.html Cheers, Julien --> Julien Thierry (8): arm64: perf: Remove PMU locking arm: perf: save/resore pmsel arm: perf: Remove Remove PMU locking perf/arm_pmu: Move PMU lock to ARMv6 events arm64: perf: Do not call irq_work_run in NMI context arm/arm64: kvm: pmu: Make overflow handler NMI safe arm_pmu: Introduce pmu_irq_ops arm_pmu: Use NMIs for PMU Mark Rutland (1): arm64: perf: avoid PMXEV* indirection arch/arm/kernel/perf_event_v6.c | 26 +++++--- arch/arm/kernel/perf_event_v7.c | 77 +++++++--------------- arch/arm64/kernel/perf_event.c | 131 ++++++++++++++++++++++++------------ drivers/perf/arm_pmu.c | 143 ++++++++++++++++++++++++++++++++++------ include/kvm/arm_pmu.h | 1 + include/linux/perf/arm_pmu.h | 5 -- virt/kvm/arm/pmu.c | 25 ++++++- 7 files changed, 277 insertions(+), 131 deletions(-) --- 1.9.1