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fd383d01540f483bb6ad3c3c2523ee89-20200721 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1919316485; Tue, 21 Jul 2020 23:00:19 -0800 Received: from mtkmbs08n1.mediatek.inc (172.21.101.55) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 21 Jul 2020 23:50:10 -0700 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 22 Jul 2020 14:50:02 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 22 Jul 2020 14:50:02 +0800 From: Weiyi Lu To: Matthias Brugger , Rob Herring , Stephen Boyd , Nicolas Boichat Subject: [PATCH 0/4] Mediatek MT8192 clock and scpsys support Date: Wed, 22 Jul 2020 14:49:57 +0800 Message-ID: <1595400601-26220-1-git-send-email-weiyi.lu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200722_030017_805282_413BAED1 X-CRM114-Status: GOOD ( 10.22 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 MIME_BASE64_TEXT RAW: Message text disguised using base64 encoding -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: James Liao , Weiyi Lu , srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Wendell Lin , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This series is based on v5.8-rc1 Weiyi Lu (4): dt-bindings: ARM: Mediatek: Document bindings for MT8192 clk: mediatek: Add dt-bindings for MT8192 clocks clk: mediatek: Add configurable enable control to mtk_pll_data clk: mediatek: Add MT8192 clock support .../arm/mediatek/mediatek,apmixedsys.txt | 1 + .../bindings/arm/mediatek/mediatek,audsys.txt | 1 + .../arm/mediatek/mediatek,camsys-raw.yaml | 40 + .../bindings/arm/mediatek/mediatek,camsys.txt | 1 + .../bindings/arm/mediatek/mediatek,imgsys.txt | 2 + .../arm/mediatek/mediatek,imp_iic_wrap.yaml | 43 + .../arm/mediatek/mediatek,infracfg.txt | 1 + .../bindings/arm/mediatek/mediatek,ipesys.txt | 1 + .../arm/mediatek/mediatek,mdpsys.yaml | 38 + .../bindings/arm/mediatek/mediatek,mfgcfg.txt | 1 + .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 + .../bindings/arm/mediatek/mediatek,msdc.yaml | 39 + .../arm/mediatek/mediatek,pericfg.yaml | 1 + .../arm/mediatek/mediatek,scp-adsp.yaml | 38 + .../arm/mediatek/mediatek,topckgen.txt | 1 + .../arm/mediatek/mediatek,vdecsys-soc.yaml | 38 + .../arm/mediatek/mediatek,vdecsys.txt | 1 + .../arm/mediatek/mediatek,vencsys.txt | 1 + drivers/clk/mediatek/Kconfig | 146 ++ drivers/clk/mediatek/Makefile | 24 + drivers/clk/mediatek/clk-mt8192-aud.c | 150 ++ drivers/clk/mediatek/clk-mt8192-cam.c | 69 + drivers/clk/mediatek/clk-mt8192-cam_rawa.c | 56 + drivers/clk/mediatek/clk-mt8192-cam_rawb.c | 56 + drivers/clk/mediatek/clk-mt8192-cam_rawc.c | 56 + drivers/clk/mediatek/clk-mt8192-img.c | 57 + drivers/clk/mediatek/clk-mt8192-img2.c | 59 + .../clk/mediatek/clk-mt8192-imp_iic_wrap_c.c | 61 + .../clk/mediatek/clk-mt8192-imp_iic_wrap_e.c | 55 + .../clk/mediatek/clk-mt8192-imp_iic_wrap_n.c | 57 + .../clk/mediatek/clk-mt8192-imp_iic_wrap_s.c | 59 + .../clk/mediatek/clk-mt8192-imp_iic_wrap_w.c | 55 + .../clk/mediatek/clk-mt8192-imp_iic_wrap_ws.c | 59 + drivers/clk/mediatek/clk-mt8192-ipe.c | 61 + drivers/clk/mediatek/clk-mt8192-mdp.c | 89 + drivers/clk/mediatek/clk-mt8192-mfg.c | 54 + drivers/clk/mediatek/clk-mt8192-mm.c | 108 ++ drivers/clk/mediatek/clk-mt8192-msdc.c | 54 + drivers/clk/mediatek/clk-mt8192-msdc_top.c | 83 + drivers/clk/mediatek/clk-mt8192-scp_adsp.c | 55 + drivers/clk/mediatek/clk-mt8192-vdec.c | 81 + drivers/clk/mediatek/clk-mt8192-vdec_soc.c | 86 + drivers/clk/mediatek/clk-mt8192-venc.c | 57 + drivers/clk/mediatek/clk-mt8192.c | 1549 +++++++++++++++++ drivers/clk/mediatek/clk-mtk.h | 2 + drivers/clk/mediatek/clk-mux.h | 15 + drivers/clk/mediatek/clk-pll.c | 26 +- include/dt-bindings/clock/mt8192-clk.h | 593 +++++++ 48 files changed, 4177 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys-raw.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mdpsys.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,scp-adsp.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys-soc.yaml create mode 100644 drivers/clk/mediatek/clk-mt8192-aud.c create mode 100644 drivers/clk/mediatek/clk-mt8192-cam.c create mode 100644 drivers/clk/mediatek/clk-mt8192-cam_rawa.c create mode 100644 drivers/clk/mediatek/clk-mt8192-cam_rawb.c create mode 100644 drivers/clk/mediatek/clk-mt8192-cam_rawc.c create mode 100644 drivers/clk/mediatek/clk-mt8192-img.c create mode 100644 drivers/clk/mediatek/clk-mt8192-img2.c create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_c.c create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_e.c create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_n.c create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_s.c create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_w.c create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_ws.c create mode 100644 drivers/clk/mediatek/clk-mt8192-ipe.c create mode 100644 drivers/clk/mediatek/clk-mt8192-mdp.c create mode 100644 drivers/clk/mediatek/clk-mt8192-mfg.c create mode 100644 drivers/clk/mediatek/clk-mt8192-mm.c create mode 100644 drivers/clk/mediatek/clk-mt8192-msdc.c create mode 100644 drivers/clk/mediatek/clk-mt8192-msdc_top.c create mode 100644 drivers/clk/mediatek/clk-mt8192-scp_adsp.c create mode 100644 drivers/clk/mediatek/clk-mt8192-vdec.c create mode 100644 drivers/clk/mediatek/clk-mt8192-vdec_soc.c create mode 100644 drivers/clk/mediatek/clk-mt8192-venc.c create mode 100644 drivers/clk/mediatek/clk-mt8192.c create mode 100644 include/dt-bindings/clock/mt8192-clk.h