From patchwork Wed Jul 29 08:00:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aisheng Dong X-Patchwork-Id: 11690591 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9BA2314E3 for ; Wed, 29 Jul 2020 08:06:24 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 39A372250E for ; Wed, 29 Jul 2020 08:06:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Xx2ZpbAR" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 39A372250E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Owner; bh=wxnmAcbPxmiPaISdbiTOxs2CZ2qn6ff10ybTTHA6I5k=; b=Xx2ZpbARDy5mrPPzX/Md+uXMMb e3jlPnnqKvx728dx7SiksBu16aGzw2RSkLFxMSXlgdpqwYg3khG3xJmA9y8yHh4kZV+l2idMlgjfC wyz1SvK/Nf52Z/7jxw0km30bN2W943tuETSHtFd0aSOpvpSifPcYz8YcN68gIQNBQpSru9fT7CdqI 4a/4qW3PASn4oYWasYBHh0dekm6mPwwZt5vTgKDo+waUphjJONSDqwAEDegulxN/R+uMoPkHxTH4J nOPKGDp5QgVFBDTZECe1bPdshRjrOyrcNd0xd+EIsewnZSRn9n2CPW6GKVk4XOULW2MokFBQduJ7P EvJPcRMw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k0h4u-00078h-Up; Wed, 29 Jul 2020 08:04:44 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1k0h4r-00077M-Df for linux-arm-kernel@lists.infradead.org; Wed, 29 Jul 2020 08:04:42 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 885191A0F39; Wed, 29 Jul 2020 10:04:39 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id C8FD31A0F3E; Wed, 29 Jul 2020 10:04:35 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id DB2BF402DF; Wed, 29 Jul 2020 10:04:30 +0200 (CEST) From: Dong Aisheng To: linux-clk@vger.kernel.org Subject: [PATCH v7 00/11] clk: imx8: add new clock binding for better pm support Date: Wed, 29 Jul 2020 16:00:07 +0800 Message-Id: <1596009618-25516-1-git-send-email-aisheng.dong@nxp.com> X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200729_040441_697533_D182D3A5 X-CRM114-Status: GOOD ( 13.99 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [92.121.34.13 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Dong Aisheng , sboyd@kernel.org, mturquette@baylibre.com, linux-imx@nxp.com, kernel@pengutronix.de, fabio.estevam@nxp.com, shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch series is a preparation for the MX8 Architecture improvement. As for IMX SCU based platforms like MX8QM and MX8QXP, they are comprised of a couple of SS(Subsystems) while most of them within the same SS can be shared. e.g. Clocks, Devices and etc. However, current clock binding is using SW IDs for device tree to use which can cause troubles in writing the common -ss-xx.dtsi file for different SoCs. This patch series aims to introduce a new binding which is more close to hardware and platform independent and can makes us write a more general drivers for different SCU based SoCs. Another important thing is that on MX8, each Clock resource is associated with a power domain. So we have to attach that clock device to the power domain in order to make it work properly. Further more, the clock state will be lost when its power domain is completely off during suspend/resume, so we also introduce the clock state save&restore mechanism. It's based on latest shanw/for-next branch. The top commit is: 3c1a41dab7b8 Merge branch 'imx/defconfig' into for-next ChangeLog: v6->v7: * addressed all comments from Stephen * rebased to latest shawn/for-next v5->v6: * add scu clk unregister if add provider failed v4->v5: * Address all comments from Stephen v3->v4: * use clk-indices for LPCG to fetch each clks offset from dt v2->v3: * change scu clk into two cells binding * add clk pm patches to ease the understand of the changes v1->v2: * SCU clock changed to one cell clock binding inspired by arm,scpi.txt Documentation/devicetree/bindings/arm/arm,scpi.txt * Add required power domain property * Dropped PATCH 3&4 first, will send the updated version accordingly after the binding is finally determined, Dong Aisheng (11): dt-bindings: firmware: imx-scu: new binding to parse clocks from device tree dt-bindings: clock: imx-lpcg: add support to parse clocks from device tree clk: imx: scu: add two cells binding support clk: imx: scu: bypass cpu power domains clk: imx: scu: allow scu clk to take device pointer clk: imx: scu: add runtime pm support clk: imx: scu: add suspend/resume support clk: imx: imx8qxp-lpcg: add parsing clocks from device tree clk: imx: lpcg: allow lpcg clk to take device pointer clk: imx: clk-imx8qxp-lpcg: add runtime pm support clk: imx: lpcg: add suspend/resume support .../bindings/arm/freescale/fsl,scu.txt | 12 +- .../bindings/clock/imx8qxp-lpcg.yaml | 79 ++++-- drivers/clk/imx/clk-imx8qxp-lpcg.c | 139 +++++++++++ drivers/clk/imx/clk-imx8qxp.c | 136 +++++----- drivers/clk/imx/clk-lpcg-scu.c | 53 +++- drivers/clk/imx/clk-scu.c | 234 +++++++++++++++++- drivers/clk/imx/clk-scu.h | 56 ++++- include/dt-bindings/clock/imx8-lpcg.h | 14 ++ 8 files changed, 620 insertions(+), 103 deletions(-) create mode 100644 include/dt-bindings/clock/imx8-lpcg.h