From patchwork Mon Mar 8 06:50:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shaokun Zhang X-Patchwork-Id: 12121701 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B848C433DB for ; Mon, 8 Mar 2021 07:07:08 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6751464F96 for ; Mon, 8 Mar 2021 07:07:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6751464F96 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=hisilicon.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=RxqNjkEjhTt+8M0M089t0QClP7eSaqvNbj5C8Oqsv48=; b=hJJ0MMCtWmIgA1xUfJbBdccQ23 5/UVAuKCIwVU8MaZMx0K48uAgbfMAPQWBLAuA2KFuGK7G+oA3oqB/d2Tm2WHmzBD3yg8X6zjpZALE 9CnmEBaQ05W9CuvDzaosd3cfOpAlSdOkAwQ4wMjAlfykDZ0xFQUqIeG3qs8IXFfO5u8zySf9ADl0P 513VpFpnwRneiAOKHdHfo5jNeyx/DTfaH3iBoctB2bbO7oAwQbLXzcKxEakuLxuMCu4fL9dIlkkGe N9SLESJ6SfGEvEduwr9HLlduMEUYHPvHvaXbN93iERfIsS8HRbbLPB1Q/HH5XBeZFKPSxVHO8FC4B Xk2XRIGA==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lJ9wm-00Fcf4-6p; Mon, 08 Mar 2021 07:04:57 +0000 Received: from szxga05-in.huawei.com ([45.249.212.191]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lJ9iy-00FYjF-Qs for linux-arm-kernel@lists.infradead.org; Mon, 08 Mar 2021 06:50:59 +0000 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4Dv8723pk5zMkJN; Mon, 8 Mar 2021 14:48:14 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.498.0; Mon, 8 Mar 2021 14:50:19 +0800 From: Shaokun Zhang To: CC: Shaokun Zhang , Mark Rutland , Will Deacon , John Garry , Jonathan Cameron , "Qi Liu" Subject: [PATCH v4 0/9] Add support for HiSilicon Hip09 uncore PMU driver Date: Mon, 8 Mar 2021 14:50:28 +0800 Message-ID: <1615186237-22263-1-git-send-email-zhangshaokun@hisilicon.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210308_065044_388345_99F333BB X-CRM114-Status: GOOD ( 13.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patchset adds support for HiSilicon Hip09 SoC uncore PMUs driver which is PMU v2 and it includes: (a) Cleanup the unnecessary sanity check in patch1; (b) Refactor interrupt registration and handler function for later new uncore PMU driver in patch2; (c) Update the PMU version suffiex for existing driver in patch3 (d) Some new functions are added on L3C/HHA PMU in patch4/5; (e) New DDRC PMU model is supported using programmable counter and supports more events in patch6; (f) Add new modules SLLC and PA PMU drivers in patch7/8; (g) Update the perf document for the new functions and modules in patch9; ChangeLog v3-->v4: 1. Rebase to Linux 5.12-rc2 2. Fix some typos v2-->v3: 1. Address Mark's comments adding detailed description in git commit log to introduce new filters 2. Fix some typos 3. Add one cleanup patch to remove redundant check v1-->v2: 1. Address John's comments and fix some typos 2. Add John's Reviewed-by tags Cc: Mark Rutland Cc: Will Deacon Cc: John Garry Cc: Jonathan Cameron Cc: Qi Liu Shaokun Zhang (9): drivers/perf: hisi: Remove unnecessary check of counter index drivers/perf: hisi: Refactor code for more uncore PMUs drivers/perf: hisi: Add PMU version for uncore PMU drivers. drivers/perf: hisi: Add new functions for L3C PMU drivers/perf: hisi: Add new functions for HHA PMU drivers/perf: hisi: Update DDRC PMU for programmable counter drivers/perf: hisi: Add support for HiSilicon SLLC PMU driver drivers/perf: hisi: Add support for HiSilicon PA PMU driver docs: perf: Add new description on HiSilicon uncore PMU v2 Documentation/admin-guide/perf/hisi-pmu.rst | 49 +++ drivers/perf/hisilicon/Makefile | 3 +- drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 348 +++++++++++------ drivers/perf/hisilicon/hisi_uncore_hha_pmu.c | 301 ++++++++++----- drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 355 ++++++++++++----- drivers/perf/hisilicon/hisi_uncore_pa_pmu.c | 500 ++++++++++++++++++++++++ drivers/perf/hisilicon/hisi_uncore_pmu.c | 71 +++- drivers/perf/hisilicon/hisi_uncore_pmu.h | 20 +- drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c | 530 ++++++++++++++++++++++++++ include/linux/cpuhotplug.h | 2 + 10 files changed, 1864 insertions(+), 315 deletions(-) create mode 100644 drivers/perf/hisilicon/hisi_uncore_pa_pmu.c create mode 100644 drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c