From patchwork Fri Oct 5 15:02:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Morse X-Patchwork-Id: 10628277 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C79B3112B for ; Fri, 5 Oct 2018 15:05:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AAC1C292A8 for ; Fri, 5 Oct 2018 15:05:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9F14329545; Fri, 5 Oct 2018 15:05:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1A6E7292A8 for ; Fri, 5 Oct 2018 15:05:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=tA7v37szb68Dfnr6VvYEkuR/EJgq+cSM0RIOi8dSKag=; b=t9Stf6KYAEnSAB kIHSu539sNBVrLjxKnmIvBgy9bCYM/fueMUhzurUwo4wyyeOgvk0eyNcIwGuXy2o6NxxAQ0sHuDFZ NEMwXTqM9669xK344l/LxWkHkiSCxEiPsfbZTXdFQoTIyK9E/kjh20SRlz5aYKQMbaTM/3KO0On02 yLSWUYiWkK+yaVhYD9quUEla/BmKps0ATSHEyjb9G6zoxGQHNazB9kDHMSbeGjXjbiX4n705fiGYi ixQnBzx2qKxm3C439+zPH9ZXa+pMFecio3X4+oGv+JVCA9tH3ExZeq6/KjGczXE+eBgyhA22MpfEd NmHR4cevQ0XDwJ9e0s3A==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g8Rf8-0003eZ-EE; Fri, 05 Oct 2018 15:05:06 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g8Rd3-0002ms-9x for linux-arm-kernel@lists.infradead.org; Fri, 05 Oct 2018 15:03:26 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E849A80D; Fri, 5 Oct 2018 08:02:46 -0700 (PDT) Received: from melchizedek.Emea.Arm.com (melchizedek.emea.arm.com [10.4.12.81]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C0B843F5D3; Fri, 5 Oct 2018 08:02:44 -0700 (PDT) From: James Morse To: linux-acpi@vger.kernel.org Subject: [RFC PATCH 0/2] ACPI / PPTT: ids for caches Date: Fri, 5 Oct 2018 16:02:33 +0100 Message-Id: <20181005150235.13846-1-james.morse@arm.com> X-Mailer: git-send-email 2.19.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181005_080257_381206_5A3CC375 X-CRM114-Status: GOOD ( 13.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vijaya Kumar K , Lorenzo Pieralisi , Jeffrey Hugo , Sudeep Holla , Jeremy Linton , Tomasz Nowicki , James Morse , Richard Ruigrok , Hanjun Guo , Xiongfeng Wang , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Hi guys, To get resctrl working on arm64, we need to generate 'id's for caches. This is this value that shows up in, e.g.: | /sys/devices/system/cpu/cpu0/cache/index3/id This value needs to be unique for each level of cache, but doesn't need to be contiguous. (there may be gaps, it may not start at 0). Details in Documentation/x86/intel_rdt_ui.txt::Cache IDs resctrl receives these values back via its schemata file. e.g.: | echo "L3:0=fff;1=fff" > /sys/fs/resctrl/p1/schemata Where 0 and 1 are the ids of two caches in the system. These values become ABI, and are likely to be baked into shell scripts. We want a value that is the same over reboots, and should be the same on identical hardware, even if the PPTT is generated in a different order. The hardware doesn't give us any indication of which caches are shared, so this information must come from firmware tables. This series generates an id from the PPTT topology, based on the lowest MPIDR of the cpus that share a cache. The remaining problems with this approach are: * the 32bit ID field is full of MPIDR.Aff{0-3}. We don't have space to hide 'i/d/unified', so can only generate ids for unified caches. If we ever get an Aff4 (plenty of RES0 space in there) we can no longer generate an id. Having all these bits accounted for in the initial version doesn't feel like a good ABI choice. * Existing software is going to assume caches are numbered 0,1,2. This was documented as not guaranteed, and its likely never going to be the case if we generate ids like this. * The table walk is recursive. Fixes for the first two require extra-code to compact the ID range, which would require us generating all the IDs up front, not from hotplug callbacks as has to happen today. Alternatively, we could try and change the abi to provide a u64 as the cache id. The size isn't documented, and for resctrl userspace can treat it as a string. Better ideas welcome! Thanks, James Morse (2): ACPI / processor: Add helper to convert acpi_id to a phys_cpuid ACPI / PPTT: cacheinfo: Label caches based on fw_token arch/arm64/include/asm/acpi.h | 6 +++ drivers/acpi/pptt.c | 81 +++++++++++++++++++++++++++++++++++ drivers/acpi/processor_core.c | 16 +++++++ include/acpi/processor.h | 1 + 4 files changed, 104 insertions(+)