From patchwork Wed Oct 31 09:30:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 10662327 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4615915E9 for ; Wed, 31 Oct 2018 09:31:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 357B32A33E for ; Wed, 31 Oct 2018 09:31:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 288132A344; Wed, 31 Oct 2018 09:31:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BEC982A33E for ; Wed, 31 Oct 2018 09:31:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=MZC1UHNHJvXMHUKRnUDLmtRFC2LL4+OUZ71ziAkF4pg=; b=KPi 2xaJkHmZ0OmRKe7ye/mVgmjy9vOkc/7mN73lhiLF43mZeYPAg+nHLS6+cAULJC7HnIAHV0eGtqdWb gXcPbbq0/wdT96ChExKXZh1DidQG5BuZxljKzfM/7PVpp49AfL8wWCz2hLlVUFZ5KOg/st/+yiGN2 1cMzMOneLUj/wRDGHZiK7FXV9RZpTDiNojeq60c/MuIvrEMZU0ee6dy13oW8Qv1FLiXjUsFrIMnRv chdjAtP2MXCiKG1AJHhsxWGmSUjQWdOPfgak2gPTjAbXf8xym+kv/n9m/RI4ArXcU5AuBbkS+BCj7 IPo+N4ZfzUgAzvgxN2qWFPltzk6eW3A==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gHmqL-0003ns-6r; Wed, 31 Oct 2018 09:31:17 +0000 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gHmq4-0003WV-V2 for linux-arm-kernel@lists.infradead.org; Wed, 31 Oct 2018 09:31:03 +0000 Received: by mail-wr1-x441.google.com with SMTP id j26-v6so1473427wre.1 for ; Wed, 31 Oct 2018 02:30:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=i4hHSGsmWMk6v8HT5bX88V/ev/elSNXdtghM/lZz0Hw=; b=ZCz3p/z2iHtuFqhtgamPJy1ulsidAsb59E3JNxE9+0WQI4gv/9r/qXMVaMrIGt+ca5 fqpSqSCoouzTl1oVvuPjPRCl/mz9hZ/MCBvUyvAIyHZxHPBcbe4L7wXNGm16J/yU1fVK hf3h/QR7uGUWjmgCZ+tfFP+NuvKkVgm5y+x94= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=i4hHSGsmWMk6v8HT5bX88V/ev/elSNXdtghM/lZz0Hw=; b=VOR8x+vOew8RdLtnlTLBPPMnALw4CgAGeDF/h97Kl8cI3ZLzbboVLyiK+68VpZ/7Zq hLcH5xmviAONNhyZDO+4EeGwmRVOnW0Kf0PBoPG4V60nLi4pOwSlzuguuQOAM1F0m1Ji ziHEnbFvIcceJ98Du5YapZoOd82ScFOiaWkO5G7P4O89tZxN+L1uPZSf+VEvIiBYgrKa Sd6hCo9G/jkUVzi9FI5UAhbUZ00A4qPHcr2wJelER8jhUCRujaMaw+/okUp6Ew4yEbDs aRzD+NGWPzNqtlrQmPT0O1f+ULnz/4xq5cWrWtTOgWShJwpKKYWHZjuEYftQovyqEa1y jYJw== X-Gm-Message-State: AGRZ1gI789Ab+zNx+Qb+GE1Pzu9FkCL02WTqbya0it1YWv4J7kihvFbn 3qHrnampr5UN7xb4Xoj09YG8AA== X-Google-Smtp-Source: AJdET5djPhbr+P5/E3mygRyq6IGpWVMkxCxV6Sp6TZ52UqMmR2wV5fg5nPmjb+ZzSjh7K6GnojHwAA== X-Received: by 2002:a5d:4406:: with SMTP id z6-v6mr2046516wrq.294.1540978248230; Wed, 31 Oct 2018 02:30:48 -0700 (PDT) Received: from lmecxl0911.lme.st.com ([2a04:cec0:1086:999:fd1b:8629:a7fc:68b]) by smtp.gmail.com with ESMTPSA id w14-v6sm10737377wrt.73.2018.10.31.02.30.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 31 Oct 2018 02:30:47 -0700 (PDT) From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, alexandre.torgue@st.com Subject: [PATCH 0/5] Add support of STM32 hwspinlock Date: Wed, 31 Oct 2018 10:30:27 +0100 Message-Id: <20181031093032.20386-1-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181031_023100_999651_CC401F49 X-CRM114-Status: GOOD ( 12.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Benjamin Gaignard , linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This serie adds the support of the hardware semaphore block for stm32mp1 SoC. The last patch isn't related to the hardware itself but propose a way to test hwspinlocks. Benjamin Gaignard (5): dt-bindings: hwlock: Document STM32 hwspinlock bindings hwspinlock: add STM32 hwspinlock device ARM: dts: stm32: Add hwspinlock node for stm32mp157 SoC ARM: dts: stm32: enable hwspinlock on stm32mp157c-ed1 hwspinlock: Add test module .../bindings/hwlock/st,stm32-hwspinlock.txt | 23 ++++ arch/arm/boot/dts/stm32mp157c-ed1.dts | 4 + arch/arm/boot/dts/stm32mp157c.dtsi | 9 ++ drivers/hwspinlock/Kconfig | 18 +++ drivers/hwspinlock/Makefile | 2 + drivers/hwspinlock/hwspinlock_test.c | 132 ++++++++++++++++++ drivers/hwspinlock/stm32_hwspinlock.c | 147 +++++++++++++++++++++ 7 files changed, 335 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt create mode 100644 drivers/hwspinlock/hwspinlock_test.c create mode 100644 drivers/hwspinlock/stm32_hwspinlock.c