mbox series

[v2,0/4] arm64: Rework handling of erratum 1188873

Message ID 20190415120354.148052-1-marc.zyngier@arm.com (mailing list archive)
Headers show
Series arm64: Rework handling of erratum 1188873 | expand

Message

Marc Zyngier April 15, 2019, 12:03 p.m. UTC
When the handling of erratum 1188873 was merged, it was decided that
we'd treat both AArch32 and AArch64 equally by trapping CNTVCT. It
turns out that users of such HW feel that the overhead placed on
AArch64 userspace is unacceptable, so a less invasive solution had to
be investigated.

Instead of configuring the trapping once and for all, we switch it on
and off on exiting to EL0, depending on whether we have a 32bit task
or not. Hopefully the overhead is minimal for non-affected cores.

We also take this opportunity to apply the same workaround to
Neoverse-N1, which suffers from the same erratum in its early
revisions.

* From v1:
  - Simplified entry.S code following Robin's suggestion
  - Renumbered labels in kernel_exit
  - Didn't use the ARCH_TIMER_USR_VCT_ACCESS_EN macro, as it would create
    quite a lot of churn in include/clocksource/arm_arch_timer.h
  - Added Daniel's ack

Marc Zyngier (4):
  arm64: Restrict ARM64_ERRATUM_1188873 mitigation to AArch32
  arm64: Make ARM64_ERRATUM_1188873 depend on COMPAT
  arm64: Add part number for Neoverse N1
  arm64: Apply ARM64_ERRATUM_1188873 to Neoverse-N1

 arch/arm64/Kconfig                   | 12 +++++++-----
 arch/arm64/include/asm/cputype.h     |  2 ++
 arch/arm64/kernel/cpu_errata.c       | 13 +++++++++++--
 arch/arm64/kernel/entry.S            | 21 +++++++++++++++++++--
 drivers/clocksource/arm_arch_timer.c | 15 ---------------
 5 files changed, 39 insertions(+), 24 deletions(-)