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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id z68sm5093374pfb.37.2019.06.05.14.08.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Jun 2019 14:08:58 -0700 (PDT) From: Bjorn Andersson To: Joerg Roedel , Will Deacon , Robin Murphy Subject: [RFC 0/2] iommu: arm-smmu: Inherit SMR and CB config during init Date: Wed, 5 Jun 2019 14:08:54 -0700 Message-Id: <20190605210856.20677-1-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190605_140901_305984_5B2D3614 X-CRM114-Status: GOOD ( 12.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Patrick Daly , Jeffrey Hugo , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Vivek Gautam , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Qualcomm devices typically boot with some sort of splash screen on the display, or for some devices (i.e. recent Qualcomm laptops) an EFI framebuffer. For this the bootloader allocates a static framebuffer, configures the display hardware to output this on the display, sets up the SMMU for the display hardware and jumps to the kernel. But as the arm-smmu disables all SMRs the display hardware will no longer be able to access the framebuffer and the result is that the device resets. The given proposal reads back the SMR state at boot and for marks these contexts as busy. This ensures that the display hardware will have continued access to the framebuffer. Once a device is attached we try to match it to the predefined stream mapping, so that e.g. the display driver will inherit the particular SMRs/CBs. This has the positive side effect that on some Qualcomm platforms, e.g. QCS404, writes to the SMR registers are ignored. But as we inherit the preconfigured mapping from the bootloader we can use the arm-smmu driver on these platforms. Bjorn Andersson (2): iommu: arm-smmu: Handoff SMR registers and context banks iommu: arm-smmu: Don't blindly use first SMR to calculate mask drivers/iommu/arm-smmu-regs.h | 2 + drivers/iommu/arm-smmu.c | 100 +++++++++++++++++++++++++++++++--- 2 files changed, 93 insertions(+), 9 deletions(-)