| Message ID | 20190705085541.9356-1-raphael.gault@arm.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | arm64: Enable access to pmu registers by user-space | expand |
Hi, Any further comments on this patchset ? Cheers, On 7/5/19 9:55 AM, Raphael Gault wrote: > The perf user-space tool relies on the PMU to monitor events. It offers an > abstraction layer over the hardware counters since the underlying > implementation is cpu-dependent. We want to allow userspace tools to have > access to the registers storing the hardware counters' values directly. > This targets specifically self-monitoring tasks in order to reduce the > overhead by directly accessing the registers without having to go > through the kernel. > In order to do this we need to setup the pmu so that it exposes its registers > to userspace access. > > The first patch add a test to the perf tool so that we can test that the > access to the registers works correctly from userspace. > > The second patch add a capability in the arm64 cpufeatures framework in > order to detect when we are running on a heterogeneous system. > > The third patch focuses on the armv8 pmuv3 PMU support and makes sure that > the access to the pmu registers is enable and that the userspace have > access to the relevent information in order to use them. > > The fourth patch put in place callbacks to enable access to the hardware > counters from userspace when a compatible event is opened using the perf > API. > > The fifth patch adds a short documentation about PMU counters direct > access from userspace. > > **Changes since v1** > > * Rebased on linux-next/master > * Do not include RSEQs materials (test and utilities) since we want to > enable direct access to counters only on homogeneous systems. > * Do not include the hook defitinions for the same reason as above. > * Add a cpu feature/capability to detect heterogeneous systems. > > Raphael Gault (5): > perf: arm64: Add test to check userspace access to hardware counters. > arm64: cpufeature: Add feature to detect heterogeneous systems > arm64: pmu: Add function implementation to update event index in > userpage. > arm64: perf: Enable pmu counter direct access for perf event on armv8 > Documentation: arm64: Document PMU counters access from userspace > > .../arm64/pmu_counter_user_access.txt | 42 +++ > arch/arm64/include/asm/cpucaps.h | 3 +- > arch/arm64/include/asm/mmu.h | 6 + > arch/arm64/include/asm/mmu_context.h | 2 + > arch/arm64/include/asm/perf_event.h | 14 + > arch/arm64/kernel/cpufeature.c | 20 ++ > arch/arm64/kernel/perf_event.c | 23 ++ > drivers/perf/arm_pmu.c | 38 +++ > include/linux/perf/arm_pmu.h | 2 + > tools/perf/arch/arm64/include/arch-tests.h | 6 + > tools/perf/arch/arm64/tests/Build | 1 + > tools/perf/arch/arm64/tests/arch-tests.c | 4 + > tools/perf/arch/arm64/tests/user-events.c | 255 ++++++++++++++++++ > 13 files changed, 415 insertions(+), 1 deletion(-) > create mode 100644 Documentation/arm64/pmu_counter_user_access.txt > create mode 100644 tools/perf/arch/arm64/tests/user-events.c >
The perf user-space tool relies on the PMU to monitor events. It offers an abstraction layer over the hardware counters since the underlying implementation is cpu-dependent. We want to allow userspace tools to have access to the registers storing the hardware counters' values directly. This targets specifically self-monitoring tasks in order to reduce the overhead by directly accessing the registers without having to go through the kernel. In order to do this we need to setup the pmu so that it exposes its registers to userspace access. The first patch add a test to the perf tool so that we can test that the access to the registers works correctly from userspace. The second patch add a capability in the arm64 cpufeatures framework in order to detect when we are running on a heterogeneous system. The third patch focuses on the armv8 pmuv3 PMU support and makes sure that the access to the pmu registers is enable and that the userspace have access to the relevent information in order to use them. The fourth patch put in place callbacks to enable access to the hardware counters from userspace when a compatible event is opened using the perf API. The fifth patch adds a short documentation about PMU counters direct access from userspace. **Changes since v1** * Rebased on linux-next/master * Do not include RSEQs materials (test and utilities) since we want to enable direct access to counters only on homogeneous systems. * Do not include the hook defitinions for the same reason as above. * Add a cpu feature/capability to detect heterogeneous systems. Raphael Gault (5): perf: arm64: Add test to check userspace access to hardware counters. arm64: cpufeature: Add feature to detect heterogeneous systems arm64: pmu: Add function implementation to update event index in userpage. arm64: perf: Enable pmu counter direct access for perf event on armv8 Documentation: arm64: Document PMU counters access from userspace .../arm64/pmu_counter_user_access.txt | 42 +++ arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/mmu.h | 6 + arch/arm64/include/asm/mmu_context.h | 2 + arch/arm64/include/asm/perf_event.h | 14 + arch/arm64/kernel/cpufeature.c | 20 ++ arch/arm64/kernel/perf_event.c | 23 ++ drivers/perf/arm_pmu.c | 38 +++ include/linux/perf/arm_pmu.h | 2 + tools/perf/arch/arm64/include/arch-tests.h | 6 + tools/perf/arch/arm64/tests/Build | 1 + tools/perf/arch/arm64/tests/arch-tests.c | 4 + tools/perf/arch/arm64/tests/user-events.c | 255 ++++++++++++++++++ 13 files changed, 415 insertions(+), 1 deletion(-) create mode 100644 Documentation/arm64/pmu_counter_user_access.txt create mode 100644 tools/perf/arch/arm64/tests/user-events.c