From patchwork Mon Aug 26 07:31:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vidya Sagar X-Patchwork-Id: 11114163 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E0B1014DB for ; Mon, 26 Aug 2019 07:31:56 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BCEF72173E for ; Mon, 26 Aug 2019 07:31:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="E0pR/BfM"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="pnk2JHxE" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BCEF72173E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=axVE1G6D6VO30jAfo3qcWBrWuLqjrL5+Zvd94rsLKgM=; b=E0pR/BfMCcLZS+ Z+fHO+Lw9caywUcZUIHMDmF09Xs+lEnCiP95PrtooVPZCWAEQXngqidU5fZheMyPCh0IDqaVSTtOI oJaMG1jTkts7LZ8N2N56UqDYOBY6X/Xw/H2/xFIhwQmJmo9am+SB4APIr70k5MbPsSJJGXOdAMJP6 HF4COpgOwJANnrHFgvgrOpoi+nY9vqWGhA4WCoPt8Rw7yXHsWlBBWsDa1BNXrFS03VvxjYuqu/26U 5Lum42h863BMgYEjhqHyXafz9oFxUjlGZlVbN/KlZIX8dDaHXSodZCeSU1/+cxZpTWTfsMgMijjoU yVOzolgfnhhYuZLqV40Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1i29To-0005Kl-7a; Mon, 26 Aug 2019 07:31:56 +0000 Received: from hqemgate16.nvidia.com ([216.228.121.65]) by bombadil.infradead.org with esmtps (Exim 4.92 #3 (Red Hat Linux)) id 1i29Tl-0005KB-H6 for linux-arm-kernel@lists.infradead.org; Mon, 26 Aug 2019 07:31:54 +0000 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 26 Aug 2019 00:31:52 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 26 Aug 2019 00:31:51 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 26 Aug 2019 00:31:51 -0700 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 26 Aug 2019 07:31:51 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Mon, 26 Aug 2019 07:31:51 +0000 Received: from vidyas-desktop.nvidia.com (Not Verified[10.24.37.38]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 26 Aug 2019 00:31:50 -0700 From: Vidya Sagar To: , , , , Subject: [PATCH 0/6] PCI: tegra: Enable PCIe C5 controller of Tegra194 in p2972-0000 platform Date: Mon, 26 Aug 2019 13:01:37 +0530 Message-ID: <20190826073143.4582-1-vidyas@nvidia.com> X-Mailer: git-send-email 2.17.1 X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1566804712; bh=6X+WlnCVjo8MVsTv4k2C3wR1RSTOieIbLP/dETqEQcY=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: X-NVConfidentiality:MIME-Version:Content-Type; b=pnk2JHxEr/a4/h6s3DweEVnws1WizOX0AchEjwIVii7n/xtMDFwvWuWBv45I8sZXZ e+zZc9xBOzuZbKPTxoyxQrhmInwePOxOAZR5LvJQMofH7QfKDdxVAR1Jrs1gGNO689 XAT0ynAAzGHNW14RM02EAoKH9asEUZq3ojs1/xNBGZnppHqmqmVVmJOqEsmETyTOud BEO8fV9dCnns8qfQ+hdZLmUCwv6FvVHUg09OBAfQTO5WwVF4rV8YLs80dYPpTHK1t6 eM6OmH0OgKcB0KT5dIab9w3r668INC/A52moZAmmLhYwH6CvMyYmDR9/9pHnOKobj3 dqB1UBKw0NZcQ== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190826_003153_583405_D915E070 X-CRM114-Status: UNSURE ( 6.07 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -5.2 (-----) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-5.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [216.228.121.65 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, mmaddireddy@nvidia.com, kthota@nvidia.com, gustavo.pimentel@synopsys.com, vidyas@nvidia.com, linux-kernel@vger.kernel.org, mperttunen@nvidia.com, linux-pci@vger.kernel.org, linux-tegra@vger.kernel.org, digetx@gmail.com, kishon@ti.com, linux-arm-kernel@lists.infradead.org, sagar.tv@gmail.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch series enables Tegra194's C5 controller which owns x16 slot in p2972-0000 platform. C5 controller's PERST# and CLKREQ# are not configured as output and bi-directional signals by default and hence they need to be configured explicitly. Also, x16 slot's 3.3V and 12V supplies are controlled through GPIOs and hence they need to be enabled through regulator framework. This patch series adds required infrastructural support to address both the aforementioned requirements. Testing done on p2972-0000 platform - Able to enumerate devices connected to x16 slot (owned by C5 controller) - Enumerated device's functionality verified - Suspend-Resume sequence is verified with device connected to x16 slot Vidya Sagar (6): dt-bindings: PCI: tegra: Add sideband pins configuration entries arm64: tegra: Add configuration for PCIe C5 sideband signals PCI: tegra: Add support to configure sideband pins dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries arm64: tegra: Add PCIe slot supply information in p2972-0000 platform PCI: tegra: Add support to enable slot regulators .../bindings/pci/nvidia,tegra194-pcie.txt | 16 +++++ .../arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 24 +++++++ .../boot/dts/nvidia/tegra194-p2972-0000.dts | 4 +- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 38 +++++++++- drivers/pci/controller/dwc/pcie-tegra194.c | 71 +++++++++++++++++++ 5 files changed, 151 insertions(+), 2 deletions(-)