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Fri, 15 Nov 2019 08:29:11 -0800 (PST) From: Manivannan Sadhasivam To: sboyd@kernel.org, mturquette@baylibre.com, robh+dt@kernel.org Subject: [PATCH v7 0/7] Add Bitmain BM1880 clock driver Date: Fri, 15 Nov 2019 21:58:54 +0530 Message-Id: <20191115162901.17456-1-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191115_082914_700673_9F72234E X-CRM114-Status: GOOD ( 13.18 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:641 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Manivannan Sadhasivam , darren.tsao@bitmain.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, fisher.cheng@bitmain.com, alec.lin@bitmain.com, linux-clk@vger.kernel.org, haitao.suo@bitmain.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Hello, This patchset adds common clock driver for Bitmain BM1880 SoC clock controller. The clock controller consists of gate, divider, mux and pll clocks with different compositions. Hence, the driver uses composite clock structure in place where multiple clocking units are combined together. This patchset also removes UART fixed clock and sources clocks from clock controller for Sophon Edge board where the driver has been validated. Thanks, Mani Changes in v7: * Fixed the do_div() issue detected by kbuild test bot Changes in v6: * Dropped 'clk: Warn if clk_init_data is not zero initialized' patch * Added fixes tag to the patch adding 'clk_hw_unregister_composite' definition * Reworked the use of CLK_IS_CTITICAL flag from clk driver * Removed the use of CLK_DIVIDER_HIWORD_MASK flag from driver * Some misc cleanups to the driver * Added Rob's reviewed tag for the binding Changes in v5: * Incorporated review comments from Rob on dt binding Changes in v4: * Fixed devicetree binding issue * Added ARCH_BITMAIN as the default for the clk driver Changes in v3: * Switched to clk_hw_{register/unregister} APIs * Returned clk_hw from the in-driver registration helpers Changes in v2: * Converted the dt binding to YAML * Incorporated review comments from Stephen (majority of change is switching to new way of specifying clk parents) Manivannan Sadhasivam (7): clk: Zero init clk_init_data in helpers clk: Add clk_hw_unregister_composite helper function definition dt-bindings: clock: Add devicetree binding for BM1880 SoC arm64: dts: bitmain: Add clock controller support for BM1880 SoC arm64: dts: bitmain: Source common clock for UART controllers clk: Add common clock driver for BM1880 SoC MAINTAINERS: Add entry for BM1880 SoC clock driver .../bindings/clock/bitmain,bm1880-clk.yaml | 76 ++ MAINTAINERS | 2 + .../boot/dts/bitmain/bm1880-sophon-edge.dts | 9 - arch/arm64/boot/dts/bitmain/bm1880.dtsi | 28 + drivers/clk/Kconfig | 7 + drivers/clk/Makefile | 1 + drivers/clk/clk-bm1880.c | 969 ++++++++++++++++++ drivers/clk/clk-composite.c | 13 +- drivers/clk/clk-divider.c | 2 +- drivers/clk/clk-fixed-rate.c | 2 +- drivers/clk/clk-gate.c | 2 +- drivers/clk/clk-mux.c | 2 +- include/dt-bindings/clock/bm1880-clock.h | 82 ++ 13 files changed, 1181 insertions(+), 14 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/bitmain,bm1880-clk.yaml create mode 100644 drivers/clk/clk-bm1880.c create mode 100644 include/dt-bindings/clock/bm1880-clock.h