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[v2,0/2] ARM/decompressor: deal with disabled CP15 barrier instructions

Message ID 20191118181543.122968-1-ardb@kernel.org (mailing list archive)
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Series ARM/decompressor: deal with disabled CP15 barrier instructions | expand

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Ard Biesheuvel Nov. 18, 2019, 6:15 p.m. UTC 
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>

While trying to test my v4.4 backport of the firmware/hypervisor based spectre
v1/v2 mitigations for 32-bit ARM, I noticed that KVM/qemu failed to boot my
kernel while it booted fine under TCG emulation.

As it turns out, KVM/qemu may instantiate the VCPU with support for CP15
barrier instructions disabled, causing them to UNDEF and crash the
decompressor.

I already fixed the same issue for UEFI boot, but since v4.4 does not support
that, I only noticed now that this is an issue for bare metal as well.

Changes since v1:
- instead of using v7 barriers in the v7 code, enable the CP15 barriers - this
  way, we can keep using the v7 routines for some v6 CPUs that implement CPUID
  instructions (causing them to take the v7 path) but not for the v7 barriers.
- applied Marc's and Linus's acks to #2 only

I have tested this via kernelci [0], which includes the v6 pogoplug that got
broken by the v1 version of this series.

[0] https://kernelci.org/build/ardb/branch/for-kernelci/kernel/v5.4-rc8-2-gcaea8d2861c8/

Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Marc Zyngier <maz@kernel.org>

Ard Biesheuvel (2):
  ARM/decompressor: enable CP15 barrier instructions in v7 cache setup
    code
  Revert "ARM: 8857/1: efi: enable CP15 DMB instructions before cleaning
    the cache"

 arch/arm/boot/compressed/head.S | 29 ++++++++++----------
 1 file changed, 14 insertions(+), 15 deletions(-)