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[v2,0/4] cpuidle: psci: Some fixes when using the hierarchical layout

Message ID 20200303203559.23995-1-ulf.hansson@linaro.org (mailing list archive)
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Series cpuidle: psci: Some fixes when using the hierarchical layout | expand

Message

Ulf Hansson March 3, 2020, 8:35 p.m. UTC
Changes in v2:
	- Small changes to patch 3 and 4, see their changelogs.

While collaborating with Benjamin Gaignard to deploy the hierarchical layout
for an ST SoC, it has turned that I have clearly missed to test a couple of
corner cases in recently added support to the cpuidle-psci driver.

This series are fixing the issues we have found.

Kind regards
Ulf Hansson


Ulf Hansson (4):
  PM / Domains: Allow no domain-idle-states DT property in genpd when
    parsing
  cpuidle: psci: Fixup support for domain idle states being zero
  cpuidle: psci: Split psci_dt_cpu_init_idle()
  cpuidle: psci: Allow WFI to be the only state for the hierarchical
    topology

 drivers/base/power/domain.c           |  2 +-
 drivers/cpuidle/cpuidle-psci-domain.c |  6 ++
 drivers/cpuidle/cpuidle-psci.c        | 92 ++++++++++++++++-----------
 3 files changed, 63 insertions(+), 37 deletions(-)

Comments

Rafael J. Wysocki March 3, 2020, 10:27 p.m. UTC | #1
On Tue, Mar 3, 2020 at 9:36 PM Ulf Hansson <ulf.hansson@linaro.org> wrote:
>
> Changes in v2:
>         - Small changes to patch 3 and 4, see their changelogs.
>
> While collaborating with Benjamin Gaignard to deploy the hierarchical layout
> for an ST SoC, it has turned that I have clearly missed to test a couple of
> corner cases in recently added support to the cpuidle-psci driver.
>
> This series are fixing the issues we have found.

I can apply the whole series, but I'd need an ACK from the PSCI driver
maintainers for that.

Thanks!
Ulf Hansson March 9, 2020, 7:20 a.m. UTC | #2
On Tue, 3 Mar 2020 at 23:28, Rafael J. Wysocki <rafael@kernel.org> wrote:
>
> On Tue, Mar 3, 2020 at 9:36 PM Ulf Hansson <ulf.hansson@linaro.org> wrote:
> >
> > Changes in v2:
> >         - Small changes to patch 3 and 4, see their changelogs.
> >
> > While collaborating with Benjamin Gaignard to deploy the hierarchical layout
> > for an ST SoC, it has turned that I have clearly missed to test a couple of
> > corner cases in recently added support to the cpuidle-psci driver.
> >
> > This series are fixing the issues we have found.
>
> I can apply the whole series, but I'd need an ACK from the PSCI driver
> maintainers for that.

Patch 1 and patch 3 is ready to go. Although, patch 3 don't need the
fixes tag and can be queued for v5.17 instead.

Do you want me to resend or can you pick them from the series?

Kind regards
Uffe
Rafael J. Wysocki March 10, 2020, 8:37 a.m. UTC | #3
On Mon, Mar 9, 2020 at 8:21 AM Ulf Hansson <ulf.hansson@linaro.org> wrote:
>
> On Tue, 3 Mar 2020 at 23:28, Rafael J. Wysocki <rafael@kernel.org> wrote:
> >
> > On Tue, Mar 3, 2020 at 9:36 PM Ulf Hansson <ulf.hansson@linaro.org> wrote:
> > >
> > > Changes in v2:
> > >         - Small changes to patch 3 and 4, see their changelogs.
> > >
> > > While collaborating with Benjamin Gaignard to deploy the hierarchical layout
> > > for an ST SoC, it has turned that I have clearly missed to test a couple of
> > > corner cases in recently added support to the cpuidle-psci driver.
> > >
> > > This series are fixing the issues we have found.
> >
> > I can apply the whole series, but I'd need an ACK from the PSCI driver
> > maintainers for that.
>
> Patch 1 and patch 3 is ready to go. Although, patch 3 don't need the
> fixes tag and can be queued for v5.17 instead.
>
> Do you want me to resend or can you pick them from the series?

Yes, please!