[0/6] soc: xilinx: vcu: provide interfaces for other drivers

Message

Michael Tretter March 17, 2020, 9:41 a.m. UTC

Hello,

The Xilinx VCU is glue for integrating the Allegro DVT codec into the ZynqMP
PL infrastructure. This glue is responsible for generating the clocks for the
actual codec and provides registers for reading the codec configuration. Other
drivers, e.g. the allegro-dvt driver, need to interact or at least read
information from the xlnx_vcu driver.

Therefore, the xlnx_vcu driver should provide its clocks for other drivers and
register the generated clocks in the clock tree. This allows other drivers to
simply get the clock rate via the usual interface.

It is not so simple for the second register bank (called "logicoreip" in the
original binding), because there are various registers for the encoder, the
decoder and common stuff (see PG252, H.264/H.265 Video Codec Unit v1.2, p.
14). Therefore, I decided to extract a separate binding for this register
bank, call it "xlnx,vcu-settings" and use a syscon interface that can be used
by the xlnx_vcu driver and other drivers that need this information.

I'm not too happy with this solution, but I couldn't come up with a better
solution without inventing a new interface, which I really don't want to do
for that use case.

I kept the behavior of the xlnx_vcu driver backwards compatible, to avoid
breaking systems that use device trees with the xlnx,vcu device tree node as
generated by Vivado, but to be able to use the register bank from other
drivers, you must use the new binding.

Michael

Michael Tretter (6):
  soc: xilinx: vcu: drop useless success message
  ARM: dts: define indexes for output clocks
  soc: xilinx: vcu: implement clock provider for output clocks
  dt-bindings: soc: xlnx: extract xlnx,vcu-settings to separate binding
  soc: xilinx: vcu: use vcu-settings syscon registers
  soc: xilinx: vcu: add missing register NUM_CORE

 .../soc/xilinx/xlnx,vcu-settings.yaml         |  45 +++++
 .../bindings/soc/xilinx/xlnx,vcu.txt          |   9 +-
 drivers/soc/xilinx/Kconfig                    |   3 +-
 drivers/soc/xilinx/xlnx_vcu.c                 | 163 ++++++++++++------
 include/dt-bindings/clock/xlnx-vcu.h          |  15 ++
 include/linux/mfd/syscon/xlnx-vcu.h           |  39 +++++
 6 files changed, 216 insertions(+), 58 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml
 create mode 100644 include/dt-bindings/clock/xlnx-vcu.h
 create mode 100644 include/linux/mfd/syscon/xlnx-vcu.h

Comments

Michal Simek March 17, 2020, 11:09 a.m. UTC | #1

On 17. 03. 20 10:41, Michael Tretter wrote:
> Hello,
> 
> The Xilinx VCU is glue for integrating the Allegro DVT codec into the ZynqMP
> PL infrastructure. This glue is responsible for generating the clocks for the
> actual codec and provides registers for reading the codec configuration. Other
> drivers, e.g. the allegro-dvt driver, need to interact or at least read
> information from the xlnx_vcu driver.
> 
> Therefore, the xlnx_vcu driver should provide its clocks for other drivers and
> register the generated clocks in the clock tree. This allows other drivers to
> simply get the clock rate via the usual interface.
> 
> It is not so simple for the second register bank (called "logicoreip" in the
> original binding), because there are various registers for the encoder, the
> decoder and common stuff (see PG252, H.264/H.265 Video Codec Unit v1.2, p.
> 14). Therefore, I decided to extract a separate binding for this register
> bank, call it "xlnx,vcu-settings" and use a syscon interface that can be used
> by the xlnx_vcu driver and other drivers that need this information.
> 
> I'm not too happy with this solution, but I couldn't come up with a better
> solution without inventing a new interface, which I really don't want to do
> for that use case.
> 
> I kept the behavior of the xlnx_vcu driver backwards compatible, to avoid
> breaking systems that use device trees with the xlnx,vcu device tree node as
> generated by Vivado, but to be able to use the register bank from other
> drivers, you must use the new binding.
> 
> Michael
> 
> Michael Tretter (6):
>   soc: xilinx: vcu: drop useless success message
>   ARM: dts: define indexes for output clocks
>   soc: xilinx: vcu: implement clock provider for output clocks
>   dt-bindings: soc: xlnx: extract xlnx,vcu-settings to separate binding
>   soc: xilinx: vcu: use vcu-settings syscon registers
>   soc: xilinx: vcu: add missing register NUM_CORE
> 
>  .../soc/xilinx/xlnx,vcu-settings.yaml         |  45 +++++
>  .../bindings/soc/xilinx/xlnx,vcu.txt          |   9 +-
>  drivers/soc/xilinx/Kconfig                    |   3 +-
>  drivers/soc/xilinx/xlnx_vcu.c                 | 163 ++++++++++++------
>  include/dt-bindings/clock/xlnx-vcu.h          |  15 ++
>  include/linux/mfd/syscon/xlnx-vcu.h           |  39 +++++
>  6 files changed, 216 insertions(+), 58 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/soc/xilinx/xlnx,vcu-settings.yaml
>  create mode 100644 include/dt-bindings/clock/xlnx-vcu.h
>  create mode 100644 include/linux/mfd/syscon/xlnx-vcu.h
> 

Rohit: Please take a look at this series and also take a look at missing
pieces we have in soc vendor tree.

Thanks,
Michal