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Fri, 20 Mar 2020 18:24:32 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 00/23] irqchip/gic-v4: GICv4.1 architecture support Date: Fri, 20 Mar 2020 18:23:43 +0000 Message-Id: <20200320182406.23465-1-maz@kernel.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, lorenzo.pieralisi@arm.com, jason@lakedaemon.net, tglx@linutronix.de, yuzenghui@huawei.com, eric.auger@redhat.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200320_112435_950727_FFB6153B X-CRM114-Status: GOOD ( 17.23 ) X-Spam-Score: -5.2 (-----) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-5.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [198.145.29.99 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lorenzo Pieralisi , Jason Cooper , Suzuki K Poulose , Eric Auger , James Morse , Zenghui Yu , Thomas Gleixner , Julien Thierry Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This (now shorter) series expands the existing GICv4 support to deal with the new GICv4.1 architecture, which comes with a set of major improvements compared to v4.0: - One architectural doorbell per vcpu, instead of one doorbell per VLPI - Doorbell entirely managed by the HW, with an "at most once" delivery guarantee per non-residency phase and only when requested by the hypervisor - A shared memory scheme between ITSs and redistributors, allowing for an optimised residency sequence (the use of VMOVP becomes less frequent) - Support for direct virtual SGI delivery (the injection path still involves the hypervisor), at the cost of losing the active state on SGIs. It shouldn't be a big deal, but some guest operating systems might notice (Linux definitely won't care). Some documentation is now available [0] in the IHI0069F documentation from ARM (although still not final). The series is roughly organised in 3 parts: (0) Fixes (1) v4.1 doorbell management (2) Virtual SGI support (3) Plumbing of virtual SGIs in KVM Notes: - The whole thing is tested on a FVP model, which can be obtained free of charge on ARM's developer website. It requires you to create an account, unfortunately... - This series has uncovered a behaviour that looks like a HW bug on the Cavium ThunderX (aka TX1) platform. The fix for this is now in mainline (d01fd161e859). - I'm extremely grateful for Zenghui Yu's huge effort in carefully reviewing this rather difficult series (if we ever get to meet face to face, drinks are definitely on me!). - Thanks to Eric Auger for having joined the fun and spotted a number of funky things! - This is now left to brew in -next. Any issue will be fixed by addtional patches. * From v5 [5] - Fixed VMOVP not being issued on systems that are not single-VMOVP capable - Propagated error on irq_get_irqchip_state() failure for vSGIs - vSGI pending state is now get reported to userspace - Restoring a GICD_TYPER2 value that doesn't match what KVM can offer because nASSGIcap is different results in a failure - Fixed locking on switch between SGI implementations - Added more comments where required to clarify the behaviour of some of the most nebulous parts * From v4 [4] - Rebased on v5.6-rc4 - Fixed locking all over the shop now that we can bypass the ITS - Wait on INVALL at the RD level - Plentu of cleanups/fixes thanks to Zenghui's careful review effort * From v3 [3]: - Rebased on v5.6-rc1 - Considerably smaller thanks to the initial patches being merged - Small bug fix after the v5.6 merge window * From v2 [2]: - Another bunch of fixes thanks to Zenghui Yu's very careful review - HW-accelerated SGIs are now optional thanks to new architected discovery/selection bits exposed by KVM and used by the guest kernel - Rebased on v5.5-rc2 * From v1 [1]: - A bunch of minor reworks after Zenghui Yu's review - A workaround for what looks like a new and unexpected TX1 bug - A subtle reorder of the series so that some patches can go in early [0] https://static.docs.arm.com/ihi0069/f/IHI0069F_gic_architecture_specification_v3_and_v4.1.pdf [1] https://lore.kernel.org/lkml/20190923182606.32100-1-maz@kernel.org/ [2] https://lore.kernel.org/lkml/20191027144234.8395-1-maz@kernel.org/ [3] https://lore.kernel.org/r/20191224111055.11836-1-maz@kernel.org/ [4] https://lore.kernel.org/r/20200214145736.18550-1-maz@kernel.org/ [5] https://lore.kernel.org/r/20200304203330.4967-1-maz@kernel.org/ Marc Zyngier (22): irqchip/gic-v3: Use SGIs without active state if offered irqchip/gic-v4.1: Skip absent CPUs while iterating over redistributors irqchip/gic-v4.1: Ensure mutual exclusion between vPE affinity change and RD access irqchip/gic-v4.1: Ensure mutual exclusion betwen invalidations on the same RD irqchip/gic-v4.1: Advertise support v4.1 to KVM irqchip/gic-v4.1: Map the ITS SGIR register page irqchip/gic-v4.1: Plumb skeletal VSGI irqchip irqchip/gic-v4.1: Add initial SGI configuration irqchip/gic-v4.1: Plumb mask/unmask SGI callbacks irqchip/gic-v4.1: Plumb get/set_irqchip_state SGI callbacks irqchip/gic-v4.1: Plumb set_vcpu_affinity SGI callbacks irqchip/gic-v4.1: Move doorbell management to the GICv4 abstraction layer irqchip/gic-v4.1: Add VSGI allocation/teardown irqchip/gic-v4.1: Add VSGI property setup irqchip/gic-v4.1: Eagerly vmap vPEs KVM: arm64: GICv4.1: Let doorbells be auto-enabled KVM: arm64: GICv4.1: Add direct injection capability to SGI registers KVM: arm64: GICv4.1: Allow SGIs to switch between HW and SW interrupts KVM: arm64: GICv4.1: Plumb SGI implementation selection in the distributor KVM: arm64: GICv4.1: Reload VLPI configuration on distributor enable/disable KVM: arm64: GICv4.1: Allow non-trapping WFI when using HW SGIs KVM: arm64: GICv4.1: Expose HW-based SGIs in debugfs Zenghui Yu (1): irqchip/gic-v4.1: Wait for completion of redistributor's INVALL operation arch/arm/include/asm/kvm_host.h | 1 + arch/arm64/include/asm/kvm_emulate.h | 3 +- arch/arm64/include/asm/kvm_host.h | 1 + drivers/irqchip/irq-gic-v3-its.c | 422 +++++++++++++++++++++++-- drivers/irqchip/irq-gic-v3.c | 13 +- drivers/irqchip/irq-gic-v4.c | 134 +++++++- include/kvm/arm_vgic.h | 4 + include/linux/irqchip/arm-gic-common.h | 2 + include/linux/irqchip/arm-gic-v3.h | 20 +- include/linux/irqchip/arm-gic-v4.h | 25 +- virt/kvm/arm/arm.c | 8 + virt/kvm/arm/vgic/vgic-debug.c | 14 +- virt/kvm/arm/vgic/vgic-mmio-v3.c | 81 ++++- virt/kvm/arm/vgic/vgic-mmio.c | 88 +++++- virt/kvm/arm/vgic/vgic-v3.c | 6 +- virt/kvm/arm/vgic/vgic-v4.c | 141 +++++++-- virt/kvm/arm/vgic/vgic.h | 1 + 17 files changed, 895 insertions(+), 69 deletions(-)