[0/8] ARM: omap4/5: crypto support fixes

Message ID	20200429143002.5050-1-t-kristo@ti.com (mailing list archive)
Headers	show Return-Path: <SRS0=Qajn=6N=lists.infradead.org=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@kernel.org> DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DC89D2074A From: Tero Kristo <t-kristo@ti.com> To: <linux-omap@vger.kernel.org>, <tony@atomide.com> Subject: [PATCH 0/8] ARM: omap4/5: crypto support fixes Date: Wed, 29 Apr 2020 17:29:54 +0300 Message-ID: <20200429143002.5050-1-t-kristo@ti.com> MIME-Version: 1.0 summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [198.47.23.249 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender Precedence: list Cc: linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org
Series	ARM: omap4/5: crypto support fixes \| expand [0/8] ARM: omap4/5: crypto support fixes [1/8] ARM: dts: omap4: fix node names for the l4_cm clkctrl nodes [2/8] ARM: dts: omap5: fix node names for the l4_cm clkctrl nodes [3/8] ARM: dts: omap5: add aes1 entry [4/8] ARM: dts: omap5: add aes2 entry [5/8] ARM: dts: omap5: add SHA crypto accelerator node [6/8] ARM: dts: omap5: add DES crypto accelerator node [7/8] ARM: OMAP4: Make L4SEC clock domain SWSUP only [8/8] ARM: OMAP5: Make L4SEC clock domain SWSUP only

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20200429143002.5050-1-t-kristo@ti.com (mailing list archive)

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DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DC89D2074A
From: Tero Kristo <t-kristo@ti.com>
To: <linux-omap@vger.kernel.org>, <tony@atomide.com>
Subject: [PATCH 0/8] ARM: omap4/5: crypto support fixes
Date: Wed, 29 Apr 2020 17:29:54 +0300
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Series

ARM: omap4/5: crypto support fixes | expand

Message

Tero Kristo April 29, 2020, 2:29 p.m. UTC

Hi,

This series fixes a couple of crypto data bugs for omap4/5. It also adds
support for crypto accelerators for omap5; the data for these is just
basically copied over from omap4.

OMAP5 currently appears to be running out of available DMA channels,
SPI/MMC are allocating a huge number of channels permanently in boot and
there are only 32 of them available in total. To mitigate the issue
partly, I have left the DES node disabled by default to save two
channels, if someone needs DES support, it can be easily enabled.
However, it might be useful to actually disable some of the SPI/MMC
nodes to save on the number of channels and to avoid running into any
problems.

-Tero


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