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Thu, 14 May 2020 05:03:06 +0000 From: To: , , Subject: [PATCH 00/16] ARM: dts: at91: sama5d2: Rework Flexcom definitions Thread-Topic: [PATCH 00/16] ARM: dts: at91: sama5d2: Rework Flexcom definitions Thread-Index: AQHWKaz0lTobzlRRV0ujGkZZNIV0NQ== Date: Thu, 14 May 2020 05:03:06 +0000 Message-ID: <20200514050301.147442-1-tudor.ambarus@microchip.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: bootlin.com; dkim=none (message not signed) header.d=none;bootlin.com; dmarc=none action=none header.from=microchip.com; x-originating-ip: [94.177.32.156] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: d7005605-d41b-49e4-86c6-08d7f7c416b2 x-ms-traffictypediagnostic: BY5PR11MB4483: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-bypassexternaltag: True x-ms-oob-tlc-oobclassifiers: OLM:8882; x-forefront-prvs: 040359335D x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: C9O2m4BIM+PhdGFC9+lAjOGFdyhMRgMIBsIoTjq5m6cUS0iJHf9SiA66qefzd2Xx8WVRaA3w5D768jHSQ/SUorPsoyuUGdeLA0nTTQGIIVUOkrYxtlgXZ1jCrhuCfSJUw2vXe8ALJyaC1qWqzqgPBSUYPaYuAmUOOJdDREHY134mjeQg7hEzi3GMARAHuzUgROjdNnJ1dhJYQ5OlRzt/X3Y4U+wtmCvkg2oyEXRp7KbPEpbChCN/uqnjNss2GMUXDKbzV/MDeyTOde+ldC9gF5l7ca5Dg+sNZb/QYYDcPQDx/OBt2FIGss3ylHUrYSeV8RBDH1XzEGUse/ZK1osYZhh+woFO/NU4XRyAqh4MNOyn16yV+dAAhUYmd4x+b0E/LC4p/UZXrsRK3/SHMdTXaf+evkySbbO0H6io1CJiR7uyLWnJcutLYE/C622Nkwh5 x-forefront-antispam-report: CIP:255.255.255.255; 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The Flexcom IPs are in the SoC. Move all the flexcom nodes together with their function definitions in the SoC dtsi. Boards will just fill the pins and enable the desired functions. With this we remove the duplication of the flexcom definitions across the sama5d2 boards. Round the flexcom support and add the missing flexcom definitions. All the flexcom functions are now defined. Apart of the aliases and the new flx0 i2c function on sama5d2_xplained, the only functional change that this patch set adds, is that it uart5, uart6 and uart7 inherit the atmel,fifo-size = <32>; optional property. These nodes have both the FIFO size described and the DMA enabled. uart5 was tested on sama5d27-wlsom1-ek. On uart6 and uart7 a Bluetooth module can be connected. Tested BT uart7 on sama5d2-icp. Tudor Ambarus (16): ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi ARM: dts: at91: sama5d2: Move flx3 definitions in the SoC dtsi ARM: dts: at91: sama5d2: Move flx2 definitions in the SoC dtsi ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsi ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UART ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functions ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI function ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functions ARM: dts: at91: sama5d2: Add missing flexcom definitions ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi ARM: dts: at91: sama5d2_xplained: Add alias for DBGU ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliases arch/arm/boot/dts/at91-kizbox3-hs.dts | 4 +- arch/arm/boot/dts/at91-kizbox3_common.dtsi | 48 +-- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 64 +--- arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 12 - arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts | 12 - arch/arm/boot/dts/at91-sama5d2_icp.dts | 42 +-- arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 14 +- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 42 ++- arch/arm/boot/dts/sama5d2.dtsi | 295 +++++++++++++++++- 9 files changed, 347 insertions(+), 186 deletions(-)