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Tue, 19 May 2020 11:01:41 -0700 (PDT) From: Jean-Philippe Brucker To: iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, linux-mm@kvack.org Subject: [PATCH v7 00/24] iommu: Shared Virtual Addressing for SMMUv3 Date: Tue, 19 May 2020 19:54:38 +0200 Message-Id: <20200519175502.2504091-1-jean-philippe@linaro.org> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200519_110143_854953_26D551A4 X-CRM114-Status: GOOD ( 12.84 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:441 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fenghua.yu@intel.com, kevin.tian@intel.com, jacob.jun.pan@linux.intel.com, jgg@ziepe.ca, catalin.marinas@arm.com, joro@8bytes.org, robin.murphy@arm.com, hch@infradead.org, zhangfei.gao@linaro.org, Jean-Philippe Brucker , Jonathan.Cameron@huawei.com, felix.kuehling@amd.com, xuzaibo@huawei.com, will@kernel.org, christian.koenig@amd.com, baolu.lu@linux.intel.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Shared Virtual Addressing (SVA) allows to share process page tables with devices using the IOMMU, PASIDs and I/O page faults. Add SVA support to the Arm SMMUv3 driver. Since v6 [1]: * Rename ioasid_free() to ioasid_put() in patch 02, requiring changes to the Intel drivers. * Use mmu_notifier_register() in patch 16 to avoid copying the ops and simplify the invalidate() notifier in patch 17. * As a result, replace context spinlock with a mutex. Simplified locking in patch 11 (That patch still looks awful, but I think the series is more readable overall). And I've finally been able to remove the GFP_ATOMIC allocations. * Use a single patch (04) for io-pgfault.c, since the code was simplified in v6. Fixed partial list in patch 04. [1] https://lore.kernel.org/linux-iommu/20200430143424.2787566-1-jean-philippe@linaro.org/ Jean-Philippe Brucker (24): mm: Add a PASID field to mm_struct iommu/ioasid: Add ioasid references iommu/sva: Add PASID helpers iommu: Add a page fault handler arm64: mm: Add asid_gen_match() helper arm64: mm: Pin down ASIDs for sharing mm with devices iommu/io-pgtable-arm: Move some definitions to a header iommu/arm-smmu-v3: Manage ASIDs with xarray arm64: cpufeature: Export symbol read_sanitised_ftr_reg() iommu/arm-smmu-v3: Share process page tables iommu/arm-smmu-v3: Seize private ASID iommu/arm-smmu-v3: Add support for VHE iommu/arm-smmu-v3: Enable broadcast TLB maintenance iommu/arm-smmu-v3: Add SVA feature checking iommu/arm-smmu-v3: Add SVA device feature iommu/arm-smmu-v3: Implement iommu_sva_bind/unbind() iommu/arm-smmu-v3: Hook up ATC invalidation to mm ops iommu/arm-smmu-v3: Add support for Hardware Translation Table Update iommu/arm-smmu-v3: Maintain a SID->device structure dt-bindings: document stall property for IOMMU masters iommu/arm-smmu-v3: Add stall support for platform devices PCI/ATS: Add PRI stubs PCI/ATS: Export PRI functions iommu/arm-smmu-v3: Add support for PRI drivers/iommu/Kconfig | 12 + drivers/iommu/Makefile | 2 + .../devicetree/bindings/iommu/iommu.txt | 18 + arch/arm64/include/asm/mmu.h | 1 + arch/arm64/include/asm/mmu_context.h | 11 +- drivers/iommu/io-pgtable-arm.h | 30 + drivers/iommu/iommu-sva.h | 15 + include/linux/ioasid.h | 10 +- include/linux/iommu.h | 53 + include/linux/mm_types.h | 4 + include/linux/pci-ats.h | 8 + arch/arm64/kernel/cpufeature.c | 1 + arch/arm64/mm/context.c | 103 +- drivers/iommu/arm-smmu-v3.c | 1552 +++++++++++++++-- drivers/iommu/intel-iommu.c | 4 +- drivers/iommu/intel-svm.c | 6 +- drivers/iommu/io-pgfault.c | 459 +++++ drivers/iommu/io-pgtable-arm.c | 27 +- drivers/iommu/ioasid.c | 38 +- drivers/iommu/iommu-sva.c | 85 + drivers/iommu/of_iommu.c | 5 +- drivers/pci/ats.c | 4 + MAINTAINERS | 3 +- 23 files changed, 2286 insertions(+), 165 deletions(-) create mode 100644 drivers/iommu/io-pgtable-arm.h create mode 100644 drivers/iommu/iommu-sva.h create mode 100644 drivers/iommu/io-pgfault.c create mode 100644 drivers/iommu/iommu-sva.c