From patchwork Mon May 25 12:52:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenyu Ye X-Patchwork-Id: 11568795 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 003A6739 for ; Mon, 25 May 2020 12:54:25 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D10F82073B for ; Mon, 25 May 2020 12:54:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="VtpaWkWY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D10F82073B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=CrKdcaOwN5b0GbFgpYpEjDQtcDGTixwb9tt6K0Wsxjs=; b=VtpaWkWYuqPTxa b6i3ropykAmKy3Oj+MNvQSeA+B3vLj3ID2G1WzN7wm85O0nIi6jdbuTxyQPDQjPZP89Q8mMWjvxe6 59hap2G5UyF56BPBqyaqAhhaQvR8SDsaPR3TrxWQcM7IR8PDy55oPk8HF2xhQKBRfcEIWcYtt3wuc QmHHIufvAUM6gQC1uO8CMbi1jOSnUnojCxJAUz9/WCNZN2Oaj1XxHz8xUDrZ9rNai2aHVc+9ACZ91 sFfvSLmbuGuQy7EMkJYAgCzch4E3d/g32vXi84QKSxiAD6QtwPpFsVnbwqyh/V4CWewbET/bppNHf YtlbIFTS3pEeCcYFMfig==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jdCcT-0000U9-PK; Mon, 25 May 2020 12:54:17 +0000 Received: from szxga06-in.huawei.com ([45.249.212.32] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jdCbo-0008P1-Bq for linux-arm-kernel@lists.infradead.org; Mon, 25 May 2020 12:53:39 +0000 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 3FEE8D8F2CB3F6E17A32; Mon, 25 May 2020 20:53:27 +0800 (CST) Received: from DESKTOP-KKJBAGG.china.huawei.com (10.173.220.25) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.487.0; Mon, 25 May 2020 20:53:18 +0800 From: Zhenyu Ye To: , , , , , , , , , , , , , , , , Subject: [PATCH v3 0/6] arm64: tlb: add support for TTL feature Date: Mon, 25 May 2020 20:52:54 +0800 Message-ID: <20200525125300.794-1-yezhenyu2@huawei.com> X-Mailer: git-send-email 2.22.0.windows.1 MIME-Version: 1.0 X-Originating-IP: [10.173.220.25] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200525_055337_003856_623C89CB X-CRM114-Status: GOOD ( 10.14 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.32 listed in list.dnswl.org] 0.0 RCVD_IN_MSPIKE_H4 RBL: Very Good reputation (+4) [45.249.212.32 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, yezhenyu2@huawei.com, linux-kernel@vger.kernel.org, xiexiangyou@huawei.com, zhangshaokun@hisilicon.com, linux-mm@kvack.org, arm@kernel.org, prime.zeng@hisilicon.com, kuhn.chenqun@huawei.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org In order to reduce the cost of TLB invalidation, ARMv8.4 provides the TTL field in TLBI instruction. The TTL field indicates the level of page table walk holding the leaf entry for the address being invalidated. This series provide support for this feature. When ARMv8.4-TTL is implemented, the operand for TLBIs looks like below: * +----------+-------+----------------------+ * | ASID | TTL | BADDR | * +----------+-------+----------------------+ * |63 48|47 44|43 0| This version updates some codes implementation according to Peter's suggestion, and adds some commit msg. See patches for details, Thanks. --- ChangeList: v3: minor changes: reduce the indentation levels of __tlbi_level(). v2: rebase series on Linux 5.7-rc1 and simplify the code implementation. v1: add support for TTL feature in arm64. Marc Zyngier (2): arm64: Detect the ARMv8.4 TTL feature arm64: Add level-hinted TLB invalidation helper Peter Zijlstra (Intel) (1): tlb: mmu_gather: add tlb_flush_*_range APIs Zhenyu Ye (3): arm64: Add tlbi_user_level TLB invalidation helper mm: tlb: Provide flush_*_tlb_range wrappers arm64: tlb: Set the TTL field in flush_tlb_range arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/sysreg.h | 1 + arch/arm64/include/asm/tlb.h | 29 +++++++++++++++- arch/arm64/include/asm/tlbflush.h | 49 +++++++++++++++++++++++---- arch/arm64/kernel/cpufeature.c | 11 +++++++ include/asm-generic/pgtable.h | 12 +++++-- include/asm-generic/tlb.h | 55 ++++++++++++++++++++++--------- mm/pgtable-generic.c | 22 +++++++++++++ 8 files changed, 157 insertions(+), 25 deletions(-)