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dkim=none (message not signed) header.d=none;kernel.org; dmarc=none action=none header.from=synaptics.com; Received: from DM6PR03MB3580.namprd03.prod.outlook.com (2603:10b6:5:b2::14) by DM6PR03MB3481.namprd03.prod.outlook.com (2603:10b6:5:af::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3109.21; Fri, 19 Jun 2020 10:46:32 +0000 Received: from DM6PR03MB3580.namprd03.prod.outlook.com ([fe80::3122:b605:87fd:339e]) by DM6PR03MB3580.namprd03.prod.outlook.com ([fe80::3122:b605:87fd:339e%6]) with mapi id 15.20.3109.023; Fri, 19 Jun 2020 10:46:32 +0000 Date: Fri, 19 Jun 2020 18:44:37 +0800 From: Jisheng Zhang To: Will Deacon , Robin Murphy , Mark Rutland , Catalin Marinas Subject: [PATCH 0/3] arm64: perf: add support for Cortex-A55/A75/A76 Message-ID: <20200619184423.5e61a838@xhacker.debian> X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; x86_64-pc-linux-gnu) X-ClientProxiedBy: TYBP286CA0040.JPNP286.PROD.OUTLOOK.COM (2603:1096:404:10a::28) To DM6PR03MB3580.namprd03.prod.outlook.com (2603:10b6:5:b2::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from xhacker.debian (124.74.246.114) by TYBP286CA0040.JPNP286.PROD.OUTLOOK.COM (2603:1096:404:10a::28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3109.22 via Frontend Transport; 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X-Spam-Score: -0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [40.107.94.64 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [40.107.94.64 listed in wl.mailspike.net] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid 0.0 MSGID_FROM_MTA_HEADER Message-Id was added by a relay X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The Cortex-A55/A75/A76 use some implementation defined perf events. Add the support. Jisheng Zhang (3): arm64: perf: add support for Cortex-A55 arm64: perf: add support for Cortex-A75 arm64: perf: add support for Cortex-A76 arch/arm64/kernel/perf_event.c | 49 +++++++++++++++++++++++++++++++--- 1 file changed, 45 insertions(+), 4 deletions(-)