From patchwork Thu Jun 25 13:37:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 11625387 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B6AB214E3 for ; Thu, 25 Jun 2020 13:45:44 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9004C20781 for ; Thu, 25 Jun 2020 13:45:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="o2TPrOSF" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9004C20781 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=UCMvCGDleqP0dokqlrs0xPCXnYVcKUeYaIWPtc2MJjg=; b=o2TPrOSFOTfX9EJMV42+246s9l 7+jM2iVEdajzpfvLw3kZswEqupAxoaQXVVMeahWrl9oEf1cKDLAo/tlfvOrEKCK+fZ3ZPdzGJ+gvS kNIJM97Vc7EtapKKHlLgFpaU/73StoZgXl7s8Eh4LNM59ebN7rQVRX9E3K6ZdHKPTSNNOfPrP8Y6Z 8gvsHg8fL+yFTv4KRRUdgx4r/S/5mr6qIGZtDH8SNa6OKiRN6FJ7F7AUUUfI/JhqZehxPvz/xv6ee 3Pht0N/NuaxIfR6cEYpvpgt1PdGxXYUvLy4uLoAYfc+woYlXGULez9vux4J8/D8eE3FMI07eE+AvN 6qKz6XGQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1joSAf-0004oj-2e; Thu, 25 Jun 2020 13:44:05 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35] helo=huawei.com) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1joSAb-0004mI-P7 for linux-arm-kernel@lists.infradead.org; Thu, 25 Jun 2020 13:44:03 +0000 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 429DA41853EE28F8554D; Thu, 25 Jun 2020 21:43:50 +0800 (CST) Received: from A190218597.china.huawei.com (10.47.76.118) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Thu, 25 Jun 2020 21:43:41 +0800 From: Salil Mehta To: Subject: [PATCH RFC 0/4] Changes to Support *Virtual* CPU Hotplug for ARM64 Date: Thu, 25 Jun 2020 14:37:53 +0100 Message-ID: <20200625133757.22332-1-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 MIME-Version: 1.0 X-Originating-IP: [10.47.76.118] X-CFilter-Loop: Reflected X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.35 listed in list.dnswl.org] 0.0 RCVD_IN_MSPIKE_H4 RBL: Very Good reputation (+4) [45.249.212.35 listed in wl.mailspike.net] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, peter.maydell@linaro.org, gshan@redhat.com, kvm@vger.kernel.org, mst@redhat.com, catalin.marinas@arm.com, linuxarm@huawei.com, linux-kernel@vger.kernel.org, will@kernel.org, lorenzo.pieralisi@arm.com, maz@kernel.org, david@redhat.com, drjones@redhat.com, andre.przywara@arm.com, mehta.salil.lnk@gmail.com, richard.henderson@linaro.org, eric.auger@redhat.com, qemu-arm@nongnu.org, imammedo@redhat.com, Salil Mehta , christoffer.dall@arm.com, james.morse@arm.com, sudeep.holla@arm.com, pbonzini@redhat.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Changes to support virtual cpu hotplug in QEMU[1] have been introduced to the community as RFC. These are under review. To support virtual cpu hotplug guest kernel must: 1. Identify disabled/present vcpus and set/unset the present mask of the vcpu during initialization and hotplug event. It must also set the possible mask (which includes disabled vcpus) during init of guest kernel. 2. Provide architecture specific ACPI hooks, for example to map/unmap the logical cpuid to hwids/MPIDR. Linux kernel already has generic ACPI cpu hotplug framework support. Changes introduced in this patch-set also ensures that initialization of the cpus when virtual cpu hotplug is not supported remains un-affected. Repository: (*) Kernel changes are at, https://github.com/salil-mehta/linux.git virt-cpuhp-arm64/rfc-v1 (*) QEMU changes for vcpu hotplug could be cloned from below site, https://github.com/salil-mehta/qemu.git virt-cpuhp-armv8/rfc-v1 THINGS TO DO: 1. Handling of per-cpu variables especially the first-chunk allocations (which are NUMA aware) when the vcpu is hotplugged needs further attention and review. 2. NUMA related stuff has not been fully tested both in QEMU and kernel. 3. Comprehensive Testing including when cpu hotplug is not supported. 4. Docs DISCLAIMER: This is not a complete work but an effort to present the arm vcpu hotplug implementation to the community. This RFC is being used as a way to verify the idea mentioned above and to support changes presented for QEMU[1] to support vcpu hotplug. As of now this is *not* a production level code and might have bugs. Only a basic testing has been done on HiSilicon Kunpeng920 ARM64 based SoC for Servers to verify the proof-of-concept that has been found working! Best regards Salil. REFERENCES: [1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg712010.html [2] https://lkml.org/lkml/2019/6/28/1157 [3] https://lists.cs.columbia.edu/pipermail/kvmarm/2018-July/032316.html Organization of Patches: [Patch 1-3] (*) Changes required during guest boot time to support vcpu hotplug (*) Max cpu overflow checks (*) Changes required to pre-setup cpu-operations even for disabled cpus [Patch 4] (*) Arch changes required by guest kernel ACPI CPU Hotplug framework. Salil Mehta (4): arm64: kernel: Handle disabled[(+)present] cpus in MADT/GICC during init arm64: kernel: Bound the total(present+disabled) cpus with nr_cpu_ids arm64: kernel: Init cpu operations for all possible vcpus arm64: kernel: Arch specific ACPI hooks(like logical cpuid<->hwid etc.) arch/arm64/kernel/smp.c | 153 ++++++++++++++++++++++++++++++++-------- 1 file changed, 123 insertions(+), 30 deletions(-)