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bh=I2e7OWdtKM+pFPEyo4DPg5SvlQTX9Qtv8Uy9RdwLos4=; b=qTXr2SL4mSKD/5VBTJoyiqLsQFBsxs1p/0pVHX4PZEfhWbovBK2Gnj2vnyb7b0lX8n +mdulp7IBCdmUMpf8ZmEL9hjJMlWk6HUHngcN1GcxNlaNpRN66pM+emIiMw67bK2Xj2S aLVg6F8IyGYnEgvot8DaUZA8sf8s49skAiJpEPizErz5I4sxUYxYy5oO5CYyC5m7q0dP nCS8xIDcClxCCe5xVwBJIDPuotCrVJRzTfKLVYT80VD4PdENkZvLAQbmGY9tq+8tHjrD 3X/a0oUIv6LV0UOb+MnrvtVULpIsxxdO+ZoLkIIoo2vzmZiQPtqmGJbbx+76Jvj3K2h5 AWaA== X-Gm-Message-State: AOAM530y9c1MJ/V55Mpwp9JNxJYm8ev1ayWIlFW5wgNqqSG9n7qi9Tbc 7bB2aRLoXaErBtb306/uleo9l+xpLNwD9A== X-Google-Smtp-Source: ABdhPJwta1rDSOjCX54hbPdkwafDe4dqsFaudUpbSCCgMax0xB9Vz/fTyD62tx3Twm8dRXwy4KKy1w== X-Received: by 2002:a17:902:b603:: with SMTP id b3mr59338626pls.1.1594374360695; Fri, 10 Jul 2020 02:46:00 -0700 (PDT) Received: from shiro.work ([2400:4162:2428:2f01:7285:c2ff:fe8e:66d7]) by smtp.googlemail.com with ESMTPSA id z9sm5133213pgh.94.2020.07.10.02.45.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Jul 2020 02:46:00 -0700 (PDT) From: Daniel Palmer To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 00/12] Initial MStar/Sigmastar ARMv7 SoC support Date: Fri, 10 Jul 2020 18:45:32 +0900 Message-Id: <20200710094544.430258-1-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200710_054605_430969_69A19917 X-CRM114-Status: GOOD ( 27.27 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:643 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, arnd@arndb.de, maz@kernel.org, Daniel Palmer , linux-kernel@vger.kernel.org, linux@armlinux.org.uk, robh+dt@kernel.org, w@1wt.eu, afaerber@suse.de Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch set adds initial support for MStar/Sigmastar's Armv7 based SoCs. There is just enough here to get to a shell with an initramfs but support for a lot of the hardware is in progress and will follow. MStar also shipped chips with MIPS cores and ARM9 etc which are incompatible so I've tried to make the distinction in the code that this is strictly for the Armv7 based chips. Sorry for the spamming this. I just really want to make some progress on this because I'm worried the other bits that are needed for these SoCs (Really old AT91 support in macb and the fotg210 usb host) will be lost or stop working in the meantime. This already happened in u-boot. Differences from v4: 1. Removed the crustx board from the MStar YAML that slipped in during rebasing. (I think that change is small enough that it doesn't affect Rob's Review-by but feel free to tell me off..) 2. Changed the comment for the SoC series in the MStar YAML to a description as requested by Rob Herring. 3. Added Acked-by and Reviewed-by tags from Rob Herring. Differences from v3: 1. Fixed the issue with the mstar binding that Rob Herring's bot found. 2. Fixed the filename for the midrived08 dts. Differences from v2: 1. With Marc Zyngier's help the GIC node has been filled out properly. 2. A comment was added to the arch timer node to explain why the clock-frequency is specified. Basically the vendor u-boot is old and broken. 3. Based on Arnd Bergmann's feedback the heavy memory barrier is now implemented using a DT node to specify where the registers are instead of hardcoding their location. A binding description has been added for the new node. 4. Expanded comments around the heavy memory barrier code so it's more obvious why it looks like it does. 5. The heavy memory barrier init code was folded into the machine init function. 6. Updated the device tree bindings and prefixes based on Andreas Färber's feedback. They have also been split out into a number of commits 7. Based on Andreas Färber's feedback I've added the "riu" (register interface unit) internal bus that contains all of the peripheral registers and the proper ranges for the soc node. This bus has clocks, interrupts and some configuration register so it might get it's own driver in the future. 8. I've dropped the pmu node for now as it's not needed to boot and I'm not sure of the relationship between the single core in most of the chips and the 4 documented interrupts. 9. Numerous cosmetic changes based on Andreas Färber's feedback. Differences from v1: 1. v1 only really supported two specific chips that were known at the time of submitting that patch series. Since then it's become apparent that there are a few families of SoCs based on the same ARMv7 core, clk blocks, interrupt controllers etc and this v2 attempts to make support more generic so in the future more SoCs from this lineage can be added. Support for some other chips is already in progress and will follow. 2. v1 only added support for the BreadBee boards that I have been working on. v2 also adds support for a readily available car dash camera. 3. Support for the BreadBee board has been split into two top level dts to cleanly support if either the msc313 or msc313e is mounted on the board. The chips are pin compatible but some of the internal hardware is different. The u-boot port for these SoCs can detect which chip it is running on and select the right dts so the user doesn't have to care which chip is mounted on their board. Daniel Palmer (12): dt-bindings: vendor-prefixes: Add mstar vendor prefix dt-bindings: vendor-prefixes: Add sstar vendor prefix dt-bindings: vendor-prefixes: Add 70mai vendor prefix dt-bindings: vendor-prefixes: Add thingy.jp prefix dt-bindings: arm: Add mstar YAML schema ARM: mstar: Add machine for MStar/Sigmastar Armv7 SoCs ARM: mstar: Add binding details for mstar,l3bridge ARM: mstar: Add Armv7 base dtsi ARM: mstar: Add infinity/infinity3 family dtsis ARM: mstar: Add mercury5 series dtsis ARM: mstar: Add dts for msc313(e) based BreadBee boards ARM: mstar: Add dts for 70mai midrive d08 .../devicetree/bindings/arm/mstar.yaml | 33 ++++++++ .../bindings/misc/mstar,l3bridge.yaml | 44 ++++++++++ .../devicetree/bindings/vendor-prefixes.yaml | 8 ++ MAINTAINERS | 11 +++ arch/arm/Kconfig | 2 + arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 4 + .../dts/infinity-msc313-breadbee_crust.dts | 25 ++++++ arch/arm/boot/dts/infinity-msc313.dtsi | 14 ++++ arch/arm/boot/dts/infinity.dtsi | 7 ++ .../boot/dts/infinity3-msc313e-breadbee.dts | 25 ++++++ arch/arm/boot/dts/infinity3-msc313e.dtsi | 14 ++++ arch/arm/boot/dts/infinity3.dtsi | 7 ++ .../boot/dts/mercury5-ssc8336n-midrived08.dts | 25 ++++++ arch/arm/boot/dts/mercury5-ssc8336n.dtsi | 14 ++++ arch/arm/boot/dts/mercury5.dtsi | 7 ++ arch/arm/boot/dts/mstar-v7.dtsi | 83 +++++++++++++++++++ arch/arm/mach-mstar/Kconfig | 26 ++++++ arch/arm/mach-mstar/Makefile | 1 + arch/arm/mach-mstar/mstarv7.c | 80 ++++++++++++++++++ 20 files changed, 431 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mstar.yaml create mode 100644 Documentation/devicetree/bindings/misc/mstar,l3bridge.yaml create mode 100644 arch/arm/boot/dts/infinity-msc313-breadbee_crust.dts create mode 100644 arch/arm/boot/dts/infinity-msc313.dtsi create mode 100644 arch/arm/boot/dts/infinity.dtsi create mode 100644 arch/arm/boot/dts/infinity3-msc313e-breadbee.dts create mode 100644 arch/arm/boot/dts/infinity3-msc313e.dtsi create mode 100644 arch/arm/boot/dts/infinity3.dtsi create mode 100644 arch/arm/boot/dts/mercury5-ssc8336n-midrived08.dts create mode 100644 arch/arm/boot/dts/mercury5-ssc8336n.dtsi create mode 100644 arch/arm/boot/dts/mercury5.dtsi create mode 100644 arch/arm/boot/dts/mstar-v7.dtsi create mode 100644 arch/arm/mach-mstar/Kconfig create mode 100644 arch/arm/mach-mstar/Makefile create mode 100644 arch/arm/mach-mstar/mstarv7.c