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Sat, 18 Jul 2020 00:00:55 +0800 (CST) From: Chen-Yu Tsai To: Maxime Ripard Subject: [PATCH v2 0/8] arm64: dts: allwinner: h5: Enable CPU DVFS (cpufreq) Date: Sat, 18 Jul 2020 00:00:45 +0800 Message-Id: <20200717160053.31191-1-wens@kernel.org> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200717_120059_868706_07893C8E X-CRM114-Status: GOOD ( 14.12 ) X-Spam-Score: -5.2 (-----) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-5.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [198.145.29.99 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Chen-Yu Tsai , Rob Herring , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Chen-Yu Tsai Hi everyone, This is v2 of my Allwinner H5 SoC cpufreq support series from way back [1]. The series enables DVFS for the CPU cores (aka cpufreq) on the Allwinner H5 SoC. The OPP table was taken from Armbian, with minor tweaks to the maximum voltage to account for slightly increased voltage on some of the boards. In this version, the OPP table and tie in to the CPU cores has been split out into a separate file, like what was done for the H6. The patches adding CPU regulator supplies for all the boards that I don't have have been removed. The series now only enables cpufreq for Libre Computer ALL-H3-CC and ALL-H5-CC, and Bananapi M2+ v1.2. For the original Bananapi M2+, if I add the fixed regulator with the enable pin, it ends up causing some sort of glitch or lock up on the v1.2, which includes the original dts file. Since I haven't been able to sort it out yet, I've left it out for now. Patch 1 assigns the CPU regulator supply to all the CPU cores on the Libre Computer ALL-H3-CC. Patch 2 assigns the CPU regulator supply to all the CPU cores on the Bananapi M2+ v1.2. Patch 3 fixes the voltages specified for the GPIO-controlled regulator on the Bananapi M2+ v1.2. The voltages are slightly higher than what was originally written. Patch 4 ties the CPU clock to the CPU cores. Patch 5 adds trip points and cooling maps to the CPU thermal zones. Patch 6 adds the OPP table, based on the one from Armbian. Patch 7 hooks up the CPU regulator supply for the Libre Computer ALL-H3-CC H5 variant, and by extension, the ALL-H5-CC. Patch 8 hooks up the CPU regulator supply for the Bananapi M2+ v1.2. Changes since v1: - Re-ordered patches - Added patches to set regulator supply for all CPU cores - Added thermal trip points and cooling maps - OPP table and assignment split into separate file - Added patches to tie in OPP table file for the boards I have Please have a look. Regards ChenYu [1] https://patchwork.kernel.org/cover/10787869/ Chen-Yu Tsai (8): ARM: dts: sunxi: libretech-all-h3-cc: Add regulator supply to all CPU cores ARM: dts: sunxi: bananapi-m2-plus-v1.2: Add regulator supply to all CPU cores ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages arm64: dts: allwinner: h5: Add clock to CPU cores arm64: dts: allwinner: h5: Add trip and cooling maps to CPU thermal zones arm64: dts: allwinner: h5: Add CPU Operating Performance Points table arm64: dts: allwinner: h5: libretech-all-h3-cc: Tie in CPU OPPs arm64: dts: allwinner: h5: bananapi-m2-plus-v1.2: Tie in CPU OPPs .../boot/dts/sunxi-bananapi-m2-plus-v1.2.dtsi | 18 ++++- .../boot/dts/sunxi-libretech-all-h3-cc.dtsi | 12 +++ .../sun50i-h5-bananapi-m2-plus-v1.2.dts | 1 + .../boot/dts/allwinner/sun50i-h5-cpu-opp.dtsi | 79 +++++++++++++++++++ .../sun50i-h5-libretech-all-h3-cc.dts | 1 + arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 38 +++++++++ 6 files changed, 146 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-cpu-opp.dtsi