From patchwork Wed Sep 9 20:43:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 11766235 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 25BB6618 for ; Wed, 9 Sep 2020 20:46:45 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C7A8B206C9 for ; Wed, 9 Sep 2020 20:46:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="wEUm8CYV" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C7A8B206C9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=toshiba.co.jp Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=Xz4FM42xSZLjwKI8QMuCjuA6R1nh1ORkRKvAsaO6KpA=; b=wEUm8CYVOHdzdhSXgV7FeMeu8o t0A548sN4YDChz5whUFu5psCxR0wBEaD3rX2YTsAbR+8nWtvmW7jubEWwKzpn0M+Yyzv7rWKJLuWd 2cHXEJ58qu5FVbWPgYBmAljOm+wcqIquxlb7NUgmdyqcsQueW7Vm66lxUUad8U9lMYInZvaJN73Yr n3s0Z3cyB3QjXUD/j4VMlC/TE9EGfmb9rTmOTL4TECjnjXJmm8FK7TdZP97s/ualhysK89a0TD0w6 KPofDxkB2GVTW02v5+CsXTFmtlukIzCvN3nMxnWc4qKikDM8/yQLODoJokuJK8r5bZ7YEpValpaB7 xkFUXzpg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kG6xK-0006nU-L2; Wed, 09 Sep 2020 20:44:38 +0000 Received: from mo-csw1116.securemx.jp ([210.130.202.158] helo=mo-csw.securemx.jp) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kG6ww-0006dt-Aw for linux-arm-kernel@lists.infradead.org; Wed, 09 Sep 2020 20:44:17 +0000 Received: by mo-csw.securemx.jp (mx-mo-csw1116) id 089KhrPK005028; Thu, 10 Sep 2020 05:43:54 +0900 X-Iguazu-Qid: 2wGrblJYEyQjVTLypl X-Iguazu-QSIG: v=2; s=0; t=1599684233; q=2wGrblJYEyQjVTLypl; m=lK4uwiZ9vlrYjMKrVwSmW6xJ9iwgDZFrNR2G5MnwQtk= Received: from imx2.toshiba.co.jp (imx2.toshiba.co.jp [106.186.93.51]) by relay.securemx.jp (mx-mr1110) id 089KhojA029418; Thu, 10 Sep 2020 05:43:51 +0900 Received: from enc03.toshiba.co.jp ([106.186.93.13]) by imx2.toshiba.co.jp with ESMTP id 089KhopS001381; Thu, 10 Sep 2020 05:43:50 +0900 (JST) Received: from hop001.toshiba.co.jp ([133.199.164.63]) by enc03.toshiba.co.jp with ESMTP id 089KhnVg018522; Thu, 10 Sep 2020 05:43:50 +0900 From: Nobuhiro Iwamatsu To: Rob Herring , Linus Walleij , Catalin Marinas , Will Deacon , Arnd Bergmann , Olof Johansson Subject: [PATCH v4 0/8] Add Toshiba Visconti ARM64 Platform support Date: Thu, 10 Sep 2020 05:43:28 +0900 X-TSB-HOP: ON Message-Id: <20200909204336.2558-1-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200909_164414_762538_4E9A9FED X-CRM114-Status: GOOD ( 19.64 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [210.130.202.158 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [210.130.202.158 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, punit1.agrawal@toshiba.co.jp, linux-gpio@vger.kernel.org, Sudeep Holla , Marc Zyngier , Nobuhiro Iwamatsu , yuji2.ishikawa@toshiba.co.jp, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Visconti is a series of Toshiba's SoCs targeting image processing applications[0]. These set of patches adds support for Visconti5 a Arm v8 based SoC. The series add minimal support for the Visconti5 SoC and the TMPV7708 RM main board. Peripherals such as UART, SPI, I2c and timer use Arm's IP and work with the existing kernel drivers in the tree. The series includes a pinctrl driver to select appropriate functions on the pins. NOTE: Because Visconti5 does not have PSCI, it uses spin-table with enable-method. And this patch series does not include a clock framework, so it is a device-tree file that uses clocks with fixed-clock. This will be replaced by the clock driver in the future. [0]: https://toshiba.semicon-storage.com/ap-en/semiconductor/product/image-recognition-processors-visconti.html dt-bindings: pinctrl: Add bindings for Toshiba Visconti TMPV7700 SoC v3 -> v4: - Add Reviewed-by tag. v2 -> v3: - no update. v1 -> v2: - Fix warning by make dt_binding_check. - Use '-pins$' instead of ''^.*$':''. - Remove if/then. - Add $ref to the common pinctrl schemas. pinctrl: visconti: Add Toshiba Visconti SoCs pinctrl support v3 -> v4: - Add Reviewed-by tag. - Fix comment for spinlock_t. v2 -> v3: - Delete SET_BIT and CLR_BIT for easy to read a source. - Add a comment for spinlock_t. - Use DIV_ROUND_CLOSEST(). - Use GENMASK with #define. - Fix spelling. - Remove visconti_gpio_request_enable(). v1 -> v2: - No update. dt-bindings: arm: toshiba: add Toshiba Visconti ARM SoCs v3 -> v4: - Add Reviewed-by tag. v2 -> v3: - no update. v1 -> v2: - No update. dt-bindings: arm: toshiba: Add the TMPV7708 RM main board v3 -> v4: - Add Reviewed-by tag. v2 -> v3: - no update. v1 -> v2: - No update. arm64: visconti: Add initial support for Toshiba Visconti platform v3 -> v4: - Add Reviewed-by tag. v2 -> v3: - no update. v1 -> v2: - No update. arm64: dts: visconti: Add device tree for TMPV7708 RM main board v3 -> v4: - Add Reviewed-by tag. v2 -> v3: - no update. v1 -> v2: - Remove always-on property from timer. - Add interrputs for GIC. - Remove bootargs from chosen. stdout-path is not deleted because the boot loader cannot handle it. It will be removed in the future. - Update dtsi for using new binding of pinctrl. MAINTAINERS: Add information for Toshiba Visconti ARM SoCs v3 -> v4: - Add Reviewed-by tag. v2 -> v3: - no update. v1 -> v2: - No update. arm64: defconfig: Enable configs for Toshiba Visconti v3 -> v4: - Add Reviewed-by tag. v2 -> v3: - no update. v1 -> v2: - No update. *** BLURB HERE *** Nobuhiro Iwamatsu (8): dt-bindings: pinctrl: Add bindings for Toshiba Visconti TMPV7700 SoC pinctrl: visconti: Add Toshiba Visconti SoCs pinctrl support dt-bindings: arm: toshiba: add Toshiba Visconti ARM SoCs dt-bindings: arm: toshiba: Add the TMPV7708 RM main board arm64: visconti: Add initial support for Toshiba Visconti platform arm64: dts: visconti: Add device tree for TMPV7708 RM main board MAINTAINERS: Add information for Toshiba Visconti ARM SoCs arm64: defconfig: Enable configs for Toshiba Visconti .../devicetree/bindings/arm/toshiba.yaml | 22 + .../pinctrl/toshiba,visconti-pinctrl.yaml | 92 +++++ MAINTAINERS | 11 + arch/arm64/Kconfig.platforms | 7 + arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/toshiba/Makefile | 2 + .../boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 43 ++ arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 390 ++++++++++++++++++ .../arm64/boot/dts/toshiba/tmpv7708_pins.dtsi | 93 +++++ arch/arm64/configs/defconfig | 1 + drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/visconti/Kconfig | 14 + drivers/pinctrl/visconti/Makefile | 3 + drivers/pinctrl/visconti/pinctrl-common.c | 305 ++++++++++++++ drivers/pinctrl/visconti/pinctrl-common.h | 96 +++++ drivers/pinctrl/visconti/pinctrl-tmpv7700.c | 355 ++++++++++++++++ 17 files changed, 1437 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/toshiba.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml create mode 100644 arch/arm64/boot/dts/toshiba/Makefile create mode 100644 arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts create mode 100644 arch/arm64/boot/dts/toshiba/tmpv7708.dtsi create mode 100644 arch/arm64/boot/dts/toshiba/tmpv7708_pins.dtsi create mode 100644 drivers/pinctrl/visconti/Kconfig create mode 100644 drivers/pinctrl/visconti/Makefile create mode 100644 drivers/pinctrl/visconti/pinctrl-common.c create mode 100644 drivers/pinctrl/visconti/pinctrl-common.h create mode 100644 drivers/pinctrl/visconti/pinctrl-tmpv7700.c