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Tue, 15 Sep 2020 11:42:39 +0100 From: Marc Zyngier To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 0/2] KVM: arm64: Fix handling of S1PTW Date: Tue, 15 Sep 2020 11:42:16 +0100 Message-Id: <20200915104218.1284701-1-maz@kernel.org> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kernel-team@android.com, will@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200915_064242_468423_5B88746B X-CRM114-Status: GOOD ( 15.01 ) X-Spam-Score: -8.2 (--------) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-8.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [198.145.29.99 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -3.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Will Deacon , kernel-team@android.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org I recently managed to trigger an interesting failure mode, where a guest would be stuck on an instruction abort due to a permission fault. Interestingly enough, this IABT had S1PTW set in the ESR, indicating that it was trying to *write* to the PT. We fix it by adding the execute permission (it's an IABT, after all...), and going nowhere fast. Note that it can only happen on a system that can perform automatic updates of the page table flags. This small series fixes the issue by revamping the S1PTW handling in the context of execution faults. The first patch fixes the bug, and is definitely a stable candidate. The second patch is merely a cleanup, which can wait. Tested on an A55-based board. * From v1: - Rename kvm_vcpu_dabt_iss1tw() to kvm_vcpu_abt_iss1tw() - Don't overload kvm_vcpu_trap_is_iabt() - Introduce kvm_vcpu_trap_is_exec_fault() Marc Zyngier (2): KVM: arm64: Assume write fault on S1PTW permission fault on instruction fetch KVM: arm64: Remove S1PTW check from kvm_vcpu_dabt_iswrite() arch/arm64/include/asm/kvm_emulate.h | 14 +++++++++++--- arch/arm64/kvm/hyp/include/hyp/switch.h | 2 +- arch/arm64/kvm/mmu.c | 4 ++-- 3 files changed, 14 insertions(+), 6 deletions(-) Reviewed-by: Will Deacon