From patchwork Wed Nov 11 16:28:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Pieralisi X-Patchwork-Id: 11898129 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B21E2C388F9 for ; Wed, 11 Nov 2020 16:29:22 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3CE9420756 for ; Wed, 11 Nov 2020 16:29:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="rQBe6WDs" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3CE9420756 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=350e7Iyf/Ni/2poZPz6+JOtrIrs/ImZu41uGOF3g3z0=; b=rQBe6WDsIxtAFxZz0uSIIy4/yF jRXfa+7x1Nh+nXECThWk3UGT2PxguxZh7MTgMrL7MiqAzO8Dcihc7EKMyxltxl5QYvRy7iOwceM5J bE1iWUrmqC+o4zgaIBHQcr/tWt1/AO74HwFBGwJfZZVNuvFz6JNhN2QBWI9HFhwEqms8vkESktaJB ZQdsQ6YNQVYlkNDgb158d6vcn7H1/zx+gzQRRm+k5WV13f1DKS8Hu2G9Dgthk7Ryiu3CraUR6675q sxULsNCAE1P+CaLO4PG4PSQhDhMI06wTdy1o9gb8zmZw7BsgmMDrQX6cD5ntvaBZdFYGTFDxca4sl W8kzJYwA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kcszN-0005yQ-5S; Wed, 11 Nov 2020 16:28:53 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kcszK-0005x0-AH for linux-arm-kernel@lists.infradead.org; Wed, 11 Nov 2020 16:28:51 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A4F051FB; Wed, 11 Nov 2020 08:28:47 -0800 (PST) Received: from e121166-lin.cambridge.arm.com (e121166-lin.cambridge.arm.com [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CD18F3F6CF; Wed, 11 Nov 2020 08:28:46 -0800 (PST) From: Lorenzo Pieralisi To: linux-kernel@vger.kernel.org Subject: [PATCH 0/2] GIC v4.1: Disable VSGI support for GIC CPUIF < v4.1 Date: Wed, 11 Nov 2020 16:28:39 +0000 Message-Id: <20201111162841.3151-1-lorenzo.pieralisi@arm.com> X-Mailer: git-send-email 2.29.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201111_112850_428517_B9B54C5F X-CRM114-Status: GOOD ( 10.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Catalin Marinas , Will Deacon , LAKML , Marc Zyngier Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org GIC v4.1 introduced changes to the GIC CPU interface; systems that integrate CPUs that do not support GIC v4.1 features (as reported in the ID_AA64PFR0_EL1.GIC bitfield) and a GIC v4.1 controller must disable in software virtual SGIs support since the CPUIF and GIC controller version mismatch results in CONSTRAINED UNPREDICTABLE behaviour at architectural level. For systems with CPUs reporting ID_AA64PFR0_EL1.GIC == b0001 integrated in a system with a GIC v4.1 it _should_ still be safe to enable vLPIs (other than vSGI) since the protocol between the GIC redistributor and the GIC CPUIF was not changed from GIC v4.0 to GIC v4.1. Cc: Will Deacon Cc: Catalin Marinas Cc: Marc Zyngier Lorenzo Pieralisi (2): arm64: cpufeature: Add GIC CPUIF v4.1 detection irqchip/gic-v3-its: Disable vSGI upon (CPUIF < v4.1) detection arch/arm64/include/asm/cpucaps.h | 3 ++- arch/arm64/kernel/cpufeature.c | 10 ++++++++++ drivers/irqchip/irq-gic-v3-its.c | 20 +++++++++++++++++++- 3 files changed, 31 insertions(+), 2 deletions(-)