From patchwork Mon Mar 1 15:17:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 12109953 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1D68C433E0 for ; Mon, 1 Mar 2021 15:19:42 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 82576614A5 for ; Mon, 1 Mar 2021 15:19:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 82576614A5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=ttr5vgmW0OmGolIY0ZCJbgsIRAqlz8dlQL4rt/Np3lI=; b=lykpcnG/SicbSG8cfRvWnfGgf0 yFxJYC6oZ/2rCAyOYcRbOnk1BHkVG26KfcSn5cd9hr2XCtJCgZqJGukjxvhwNR55C61AhsPINU6Ra YK48gJa7J9wCEXpAqKlVFDOWSAtNJMTbZtx5HM3N/ZxseYzEF7Uh6gsBPvbiyTo+lnzD+MMgwsxoe 1J4yEOrJ39NJ+r6sZDd/QWPS+YNw7cPzrq8cCFlC953NJ+PsALDQuQrhksc3Y7L7W5ACaMaZoRx+5 +V7rmx0HZtt57UppppoksHfwEEkQX55ENQ/UB1FXJXrb77W8vHeQGBcD7mtupRjmQrWWzxcaOQcF7 QKJ/dogA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lGkJJ-0001XO-9i; Mon, 01 Mar 2021 15:18:13 +0000 Received: from bhuna.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e3e3]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1lGkJF-0001Tt-AL; Mon, 01 Mar 2021 15:18:10 +0000 Received: from localhost.localdomain (unknown [IPv6:2a01:e0a:4cb:a870:39a1:f0e7:a696:18c8]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id DC6CD1F44E6C; Mon, 1 Mar 2021 15:18:05 +0000 (GMT) From: Benjamin Gaignard To: p.zabel@pengutronix.de, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, ezequiel@collabora.com, mchehab@kernel.org, gregkh@linuxfoundation.org Subject: [PATCH v3 0/5] Reset driver for IMX8MQ VPU hardware block Date: Mon, 1 Mar 2021 16:17:49 +0100 Message-Id: <20210301151754.104749-1-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210301_101809_486059_3FB1F9C2 X-CRM114-Status: GOOD ( 13.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devel@driverdev.osuosl.org, devicetree@vger.kernel.org, benjamin.gaignard@collabora.com, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-imx@nxp.com, kernel@pengutronix.de, kernel@collabora.com, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The two VPUs inside IMX8MQ share the same control block which can be see as a reset hardware block. In order to be able to add the second VPU (for HECV decoding) it will be more handy if the both VPU drivers instance don't have to share the control block registers. This lead to implement it as an independ reset driver and to change the VPU driver to use it. Please note that this series break the compatibility between the DTB and kernel. This break is limited to IMX8MQ SoC and is done when the driver is still in staging directory. version 3: - Fix error in VPU example node version 2: - Document the change in VPU bindings Benjamin Gaignard (5): dt-bindings: reset: IMX8MQ VPU reset dt-bindings: media: IMX8MQ VPU: document reset usage reset: Add reset driver for IMX8MQ VPU block media: hantro: Use reset driver arm64: dts: imx8mq: Use reset driver for VPU hardware block .../bindings/media/nxp,imx8mq-vpu.yaml | 14 +- .../bindings/reset/fsl,imx8mq-vpu-reset.yaml | 54 ++++++ arch/arm64/boot/dts/freescale/imx8mq.dtsi | 31 +++- drivers/reset/Kconfig | 8 + drivers/reset/Makefile | 1 + drivers/reset/reset-imx8mq-vpu.c | 169 ++++++++++++++++++ drivers/staging/media/hantro/Kconfig | 1 + drivers/staging/media/hantro/imx8m_vpu_hw.c | 61 ++----- include/dt-bindings/reset/imx8mq-vpu-reset.h | 16 ++ 9 files changed, 294 insertions(+), 61 deletions(-) create mode 100644 Documentation/devicetree/bindings/reset/fsl,imx8mq-vpu-reset.yaml create mode 100644 drivers/reset/reset-imx8mq-vpu.c create mode 100644 include/dt-bindings/reset/imx8mq-vpu-reset.h