[v2,0/3] Enable 8D-8D-8D mode on J721E, J7200, AM654

Message

Pratyush Yadav March 5, 2021, 3:39 p.m. UTC

Hi,

Now that the OSPI controller driver and the SPI NOR core have support
for 8D-8D-8D mode, the device tree can be updated to allow Octal DTR
transactions.

Pratyush Yadav (3):
  arm64: dts: ti: k3-j721e-som-p0: Enable 8D-8D-8D mode on OSPI
  arm64: dts: ti: am654-base-board: Enable 8D-8D-8D mode on OSPI
  arm64: dts: ti: k3-j7200-som-p0: Add nodes for OSPI0

 .../arm64/boot/dts/ti/k3-am654-base-board.dts |  4 +--
 .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi      | 17 +++++++++
 arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi   | 36 +++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi   |  4 +--
 4 files changed, 57 insertions(+), 4 deletions(-)

--
2.30.0

Comments

Nishanth Menon March 11, 2021, 2:17 p.m. UTC | #1

On Fri, 5 Mar 2021 21:09:23 +0530, Pratyush Yadav wrote:
> Now that the OSPI controller driver and the SPI NOR core have support
> for 8D-8D-8D mode, the device tree can be updated to allow Octal DTR
> transactions.
> 
> Pratyush Yadav (3):
>   arm64: dts: ti: k3-j721e-som-p0: Enable 8D-8D-8D mode on OSPI
>   arm64: dts: ti: am654-base-board: Enable 8D-8D-8D mode on OSPI
>   arm64: dts: ti: k3-j7200-som-p0: Add nodes for OSPI0
> 
> [...]

Hi Pratyush Yadav,


I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/3] arm64: dts: ti: k3-j721e-som-p0: Enable 8D-8D-8D mode on OSPI
      commit: 4c20ee99dd1a36ab89c6a8c51ed25e9328d8a8cc
[2/3] arm64: dts: ti: am654-base-board: Enable 8D-8D-8D mode on OSPI
      commit: 7c172b30a540644fa53051e947d6712be5d6d6ce
[3/3] arm64: dts: ti: k3-j7200-som-p0: Add nodes for OSPI0
      commit: efbdf2e9183bd5e75c64d251c6b673ca61ea01b3


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[1] git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux.git