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Tue, 16 Mar 2021 03:15:15 -0800 Received: from mtkmbs08n2.mediatek.inc (172.21.101.56) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 16 Mar 2021 04:15:13 -0700 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 16 Mar 2021 19:15:04 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 16 Mar 2021 19:15:04 +0800 From: Seiya Wang To: Rob Herring , Matthias Brugger CC: Jonathan Cameron , Lars-Peter Clausen , Peter Meerwald-Stadler , Ulf Hansson , Chunfeng Yun , "Kishon Vijay Abraham I" , Vinod Koul , "Greg Kroah-Hartman" , Mark Brown , Daniel Lezcano , Thomas Gleixner , Wim Van Sebroeck , "Guenter Roeck" , Enric Balletbo i Serra , Hsin-Yi Wang , "Seiya Wang" , Fabien Parent , "Sean Wang" , Zhiyong Tao , Chaotian Jing , Wenbin Mei , Stanley Chu , Bayi Cheng , Chuanhong Guo , , , , , , , , , , Subject: [PATCH 00/10] Add basic node support for Mediatek MT8195 SoC Date: Tue, 16 Mar 2021 19:14:33 +0800 Message-ID: <20210316111443.3332-1-seiya.wang@mediatek.com> X-Mailer: git-send-email 2.14.1 MIME-Version: 1.0 X-TM-SNTS-SMTP: 34B5F28517A2B2BB210610747DFA29DBD96DC8560E0C1DF5C1860E28986D62C82000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210316_111528_208908_56E945AA X-CRM114-Status: GOOD ( 10.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org MT8195 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA55 and 4 CA78 cores. MT8195 share many HW IP with MT65xx series. This patchset was tested on MT8195 evaluation board to shell. Based on v5.12-rc2 Seiya Wang (10): dt-bindings: timer: Add compatible for Mediatek MT8195 dt-bindings: serial: Add compatible for Mediatek MT8195 dt-bindings: watchdog: Add compatible for Mediatek MT8195 dt-bindings: mmc: Add compatible for Mediatek MT8195 dt-bindings: spi: Add compatible for Mediatek MT8195 dt-bindings: iio: adc: Add compatible for Mediatek MT8195 dt-bindings: phy: Add compatible for Mediatek MT8195 dt-bindings: phy: Add compatible for Mediatek MT8195 dt-bindings: arm: Add compatible for Mediatek MT8195 arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile .../devicetree/bindings/arm/mediatek.yaml | 4 + .../bindings/iio/adc/mediatek,mt2701-auxadc.yaml | 1 + Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 1 + .../devicetree/bindings/phy/mediatek,tphy.yaml | 1 + .../devicetree/bindings/phy/mediatek,ufs-phy.yaml | 1 + .../devicetree/bindings/serial/mtk-uart.txt | 1 + .../bindings/spi/mediatek,spi-mtk-nor.yaml | 1 + .../bindings/timer/mediatek,mtk-timer.txt | 1 + .../devicetree/bindings/watchdog/mtk-wdt.txt | 1 + arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8195-evb.dts | 29 ++ arch/arm64/boot/dts/mediatek/mt8195.dtsi | 477 +++++++++++++++++++++ 12 files changed, 519 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8195-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8195.dtsi --- 2.14.1