| Message ID | 20210323120647.454211-1-suzuki.poulose@arm.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | coresight: Add support for ETE and TRBE | expand |
On Tue, 23 Mar 2021 12:06:28 +0000, Suzuki K Poulose wrote: > This series enables future IP trace features Embedded Trace Extension > (ETE) and Trace Buffer Extension (TRBE). This series applies on > v5.12-rc4 + some patches queued. A standalone tree is also available here [0]. > The queued patches (almost there) are included in this posting for > the sake of constructing a tree from the posting. > > ETE is the PE (CPU) trace unit for CPUs, implementing future > architecture extensions. ETE overlaps with the ETMv4 architecture, with > additions to support the newer architecture features and some restrictions > on the supported features w.r.t ETMv4. The ETE support is added by extending > the ETMv4 driver to recognise the ETE and handle the features as exposed by > the TRCIDRx registers. ETE only supports system instructions access from the > host CPU. The ETE could be integrated with a TRBE (see below), or with > the legacy CoreSight trace bus (e.g, ETRs). Thus the ETE follows same > firmware description as the ETMs and requires a node per instance. > > [...] Applied to fixes, thanks! [02/19] kvm: arm64: Disable guest access to trace filter controls commit: eed31b2332ed02ffb368eba7654350746185e6e7 Cheers, M.
On Tue, 23 Mar 2021 12:06:28 +0000, Suzuki K Poulose wrote: > This series enables future IP trace features Embedded Trace Extension > (ETE) and Trace Buffer Extension (TRBE). This series applies on > v5.12-rc4 + some patches queued. A standalone tree is also available here [0]. > The queued patches (almost there) are included in this posting for > the sake of constructing a tree from the posting. > > ETE is the PE (CPU) trace unit for CPUs, implementing future > architecture extensions. ETE overlaps with the ETMv4 architecture, with > additions to support the newer architecture features and some restrictions > on the supported features w.r.t ETMv4. The ETE support is added by extending > the ETMv4 driver to recognise the ETE and handle the features as exposed by > the TRCIDRx registers. ETE only supports system instructions access from the > host CPU. The ETE could be integrated with a TRBE (see below), or with > the legacy CoreSight trace bus (e.g, ETRs). Thus the ETE follows same > firmware description as the ETMs and requires a node per instance. > > [...] Applied to fixes, thanks! [01/19] kvm: arm64: Hide system instruction access to Trace registers commit: 4af0afe252a2701732c317585f7c3ef6596b8f3d Cheers, M.
On 23/03/2021 16:34, Marc Zyngier wrote: > On Tue, 23 Mar 2021 12:06:28 +0000, Suzuki K Poulose wrote: >> This series enables future IP trace features Embedded Trace Extension >> (ETE) and Trace Buffer Extension (TRBE). This series applies on >> v5.12-rc4 + some patches queued. A standalone tree is also available here [0]. >> The queued patches (almost there) are included in this posting for >> the sake of constructing a tree from the posting. >> >> ETE is the PE (CPU) trace unit for CPUs, implementing future >> architecture extensions. ETE overlaps with the ETMv4 architecture, with >> additions to support the newer architecture features and some restrictions >> on the supported features w.r.t ETMv4. The ETE support is added by extending >> the ETMv4 driver to recognise the ETE and handle the features as exposed by >> the TRCIDRx registers. ETE only supports system instructions access from the >> host CPU. The ETE could be integrated with a TRBE (see below), or with >> the legacy CoreSight trace bus (e.g, ETRs). Thus the ETE follows same >> firmware description as the ETMs and requires a node per instance. >> >> [...] > > Applied to fixes, thanks! > > [01/19] kvm: arm64: Hide system instruction access to Trace registers > commit: 4af0afe252a2701732c317585f7c3ef6596b8f3d > Thanks Marc !