Message ID | 20210325173916.13203-1-weifeng.voon@intel.com (mailing list archive) |
---|---|
Headers | show |
Series | net: stmmac: enable multi-vector MSI | expand |
Hello: This series was applied to netdev/net-next.git (refs/heads/master): On Fri, 26 Mar 2021 01:39:11 +0800 you wrote: > This patchset adds support for multi MSI interrupts in addition to > current single common interrupt implementation. Each MSI interrupt is tied > to a newly introduce interrupt service routine(ISR). Hence, each interrupt > will only go through the corresponding ISR. > > In order to increase the efficiency, enabling multi MSI interrupt will > automatically select the interrupt mode configuration INTM=1. When INTM=1, > the TX/RX transfer complete signal will only asserted on corresponding > sbd_perch_tx_intr_o[] or sbd_perch_rx_intr_o[] without asserting signal > on the common sbd_intr_o. Hence, for each TX/RX interrupts, only the > corresponding ISR will be triggered. > > [...] Here is the summary with links: - [v2,net-next,1/5] net: stmmac: introduce DMA interrupt status masking per traffic direction https://git.kernel.org/netdev/net-next/c/7e1c520c0d20 - [v2,net-next,2/5] net: stmmac: make stmmac_interrupt() function more friendly to MSI https://git.kernel.org/netdev/net-next/c/29e6573c61aa - [v2,net-next,3/5] net: stmmac: introduce MSI Interrupt routines for mac, safety, RX & TX https://git.kernel.org/netdev/net-next/c/8532f613bc78 - [v2,net-next,4/5] stmmac: intel: add support for multi-vector msi and msi-x https://git.kernel.org/netdev/net-next/c/b42446b9b37b - [v2,net-next,5/5] net: stmmac: use interrupt mode INTM=1 for multi-MSI https://git.kernel.org/netdev/net-next/c/6ccf12ae111e You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html