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[v2,net-next,0/5] net: stmmac: enable multi-vector MSI

Message ID 20210325173916.13203-1-weifeng.voon@intel.com (mailing list archive)
Headers show
Series net: stmmac: enable multi-vector MSI | expand

Message

Voon, Weifeng March 25, 2021, 5:39 p.m. UTC
This patchset adds support for multi MSI interrupts in addition to
current single common interrupt implementation. Each MSI interrupt is tied
to a newly introduce interrupt service routine(ISR). Hence, each interrupt
will only go through the corresponding ISR.

In order to increase the efficiency, enabling multi MSI interrupt will
automatically select the interrupt mode configuration INTM=1. When INTM=1,
the TX/RX transfer complete signal will only asserted on corresponding
sbd_perch_tx_intr_o[] or sbd_perch_rx_intr_o[] without asserting signal
on the common sbd_intr_o. Hence, for each TX/RX interrupts, only the
corresponding ISR will be triggered.

Every vendor might have different MSI vector assignment. So, this patchset
only includes multi-vector MSI assignment for Intel platform.

Changes:
v1 -> v2
 patch 2/5
 -Remove defensive check for invalid dev pointer

 patch 3/5
 - Refactor out a huge if statement into separate subfunctions.
 - Removed the netdev_info for every successful request of IRQs.
 - Return 0 for each successful request of IRQs.

 patch 4/5
 - Moved the msi tx/rx base vector check before alloc irq
 - Restuctured the clean up code after fail to alloc irq and fail to probe
 - Unprepared and unregistered the stmmac-clk if fail to alloc irq

 patch 5/5
 -Moved the readl and writel into the if statement as it is only executed
  when multi msi is enabled

Ong Boon Leong (4):
  net: stmmac: introduce DMA interrupt status masking per traffic
    direction
  net: stmmac: make stmmac_interrupt() function more friendly to MSI
  net: stmmac: introduce MSI Interrupt routines for mac, safety, RX & TX
  stmmac: intel: add support for multi-vector msi and msi-x

Wong, Vee Khee (1):
  net: stmmac: use interrupt mode INTM=1 for multi-MSI

 drivers/net/ethernet/stmicro/stmmac/common.h  |  21 +
 .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 120 ++++-
 .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c |  24 +-
 .../net/ethernet/stmicro/stmmac/dwmac4_dma.c  |   7 +
 .../net/ethernet/stmicro/stmmac/dwmac4_dma.h  |  24 +-
 .../net/ethernet/stmicro/stmmac/dwmac4_lib.c  |  30 +-
 .../net/ethernet/stmicro/stmmac/dwmac_dma.h   |  22 +-
 .../net/ethernet/stmicro/stmmac/dwmac_lib.c   |   8 +-
 .../net/ethernet/stmicro/stmmac/dwxgmac2.h    |   6 +
 .../ethernet/stmicro/stmmac/dwxgmac2_dma.c    |   8 +-
 drivers/net/ethernet/stmicro/stmmac/hwif.h    |   2 +-
 drivers/net/ethernet/stmicro/stmmac/stmmac.h  |  16 +
 .../net/ethernet/stmicro/stmmac/stmmac_main.c | 499 +++++++++++++++---
 include/linux/stmmac.h                        |   9 +
 14 files changed, 697 insertions(+), 99 deletions(-)

Comments

patchwork-bot+netdevbpf@kernel.org March 26, 2021, 9:50 p.m. UTC | #1
Hello:

This series was applied to netdev/net-next.git (refs/heads/master):

On Fri, 26 Mar 2021 01:39:11 +0800 you wrote:
> This patchset adds support for multi MSI interrupts in addition to
> current single common interrupt implementation. Each MSI interrupt is tied
> to a newly introduce interrupt service routine(ISR). Hence, each interrupt
> will only go through the corresponding ISR.
> 
> In order to increase the efficiency, enabling multi MSI interrupt will
> automatically select the interrupt mode configuration INTM=1. When INTM=1,
> the TX/RX transfer complete signal will only asserted on corresponding
> sbd_perch_tx_intr_o[] or sbd_perch_rx_intr_o[] without asserting signal
> on the common sbd_intr_o. Hence, for each TX/RX interrupts, only the
> corresponding ISR will be triggered.
> 
> [...]

Here is the summary with links:
  - [v2,net-next,1/5] net: stmmac: introduce DMA interrupt status masking per traffic direction
    https://git.kernel.org/netdev/net-next/c/7e1c520c0d20
  - [v2,net-next,2/5] net: stmmac: make stmmac_interrupt() function more friendly to MSI
    https://git.kernel.org/netdev/net-next/c/29e6573c61aa
  - [v2,net-next,3/5] net: stmmac: introduce MSI Interrupt routines for mac, safety, RX & TX
    https://git.kernel.org/netdev/net-next/c/8532f613bc78
  - [v2,net-next,4/5] stmmac: intel: add support for multi-vector msi and msi-x
    https://git.kernel.org/netdev/net-next/c/b42446b9b37b
  - [v2,net-next,5/5] net: stmmac: use interrupt mode INTM=1 for multi-MSI
    https://git.kernel.org/netdev/net-next/c/6ccf12ae111e

You are awesome, thank you!
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