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bh=MTyHlw1bzVPgkAu05APVRFzyBZW2h3oiaYrgEjPf2Zw=; b=JqC+TCZ7sLrLOHDyzq6pP2VtEBXj5goOpOb8WPXoWw46vgVELBs0Utf12sifAuA2o8 txSxj9ItEMJHHw25Q88tdQJH+B4CZY7TeM4AqIuQbGJetmyk7qYW9bQuWMdnUYkwebjt mpZ5t3G4oi/r8LVfDjBX/eTLkq3j082jjD9wVQP89ABxHVly3idXQ9oF2XDOkaCSYWxD dUEYtXm7NbGUmBVDJZ/fTyUEsIUuncZmyfZdkMd2BBBUldPusXxxIjmV4RNmMbKPpAZe C2iQAaPojBVJzewQg57ss1ARuvh7TK7PURouARsI3mhTi6aUkLSuuwr3xReANHL93Czn je0g== X-Gm-Message-State: AOAM532EAH1Rco4uwTB9BbS5+c2AIb+tR+LVghdCmf7Nq8PIsyF+pqsI K5gIqtMg6jlqJm3slUP6IcpmZWp/WjZzA82UX6Xz1/hHDjQmaJ6iu62SsGzLYlP6i8vqqe0Iemy b9yq8udwr6WDYVRfQyi6bn+0ts0oirMi+CMqxttKAmDmjkRmYpQwxDJIqTm8AV34DHY25cqsLG1 eRlQ== X-Google-Smtp-Source: ABdhPJwRmLyL3IBv/vPjtFPZmZNSmiqUbfW3CnNxaFAfTho/XLATBJ/7xhgVSlIgyZVMFCEOb7BJNegH1w== X-Received: from tabba.c.googlers.com ([fda3:e722:ac3:10:28:9cb1:c0a8:482]) (user=tabba job=sendgmr) by 2002:a05:600c:35cc:: with SMTP id r12mr20443781wmq.157.1620744174635; Tue, 11 May 2021 07:42:54 -0700 (PDT) Date: Tue, 11 May 2021 15:42:39 +0100 Message-Id: <20210511144252.3779113-1-tabba@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.31.1.607.g51e8a6a459-goog Subject: [PATCH v1 00/13] Tidy up cache.S From: Fuad Tabba To: linux-arm-kernel@lists.infradead.org Cc: will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, maz@kernel.org, ardb@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, tabba@google.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210511_074257_462126_D4FFF95C X-CRM114-Status: GOOD ( 10.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org TO: linux-arm-kernel@lists.infradead.org CC: will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, maz@kernel.org, ardb@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com Hi, As has been noted before [1], the code in cache.S isn't very tidy. Some of its functions accept address ranges by start and size, whereas others with similar names do so by start and end. This has resulted in at least one bug [2]. Moreover, invalidate_icache_range and __flush_icache_range toggle uaccess, which isn't necessary because they work on the kernel linear map [3]. This patch series attempts to fix these issues, as well as tidy up the code in general to reduce ambiguity and make it consistent with Arm terminology. No functional change intended in this series. This series is based on v5.13-rc1. You can find the applied series here [4]. Cheers, /fuad [1] https://lore.kernel.org/linux-arch/20200511075115.GA16134@willie-the-truck/ [2] https://lore.kernel.org/linux-arch/20200510075510.987823-3-hch@lst.de/ [3] https://lore.kernel.org/linux-arch/20200511110014.lb9PEahJ4hVOYrbwIb_qUHXyNy9KQzNFdb_I3YlzY6A@z/ [4] https://android-kvm.googlesource.com/linux/+/refs/heads/tabba/fixcache-5.13 Fuad Tabba (13): arm64: Do not enable uaccess for flush_icache_range arm64: Do not enable uaccess for invalidate_icache_range arm64: Downgrade flush_icache_range to invalidate arm64: Move documentation of dcache_by_line_op arm64: __inval_dcache_area to take end parameter instead of size arm64: dcache_by_line_op to take end parameter instead of size arm64: __flush_dcache_area to take end parameter instead of size arm64: __clean_dcache_area_poc to take end parameter instead of size arm64: __clean_dcache_area_pop to take end parameter instead of size arm64: __clean_dcache_area_pou to take end parameter instead of size arm64: sync_icache_aliases to take end parameter instead of size arm64: Fix cache maintenance function comments arm64: Rename arm64-internal cache maintenance functions arch/arm64/include/asm/arch_gicv3.h | 3 +- arch/arm64/include/asm/assembler.h | 52 ++++----- arch/arm64/include/asm/cacheflush.h | 69 +++++++----- arch/arm64/include/asm/efi.h | 2 +- arch/arm64/include/asm/kvm_mmu.h | 7 +- arch/arm64/kernel/alternative.c | 2 +- arch/arm64/kernel/efi-entry.S | 9 +- arch/arm64/kernel/head.S | 13 +-- arch/arm64/kernel/hibernate.c | 20 ++-- arch/arm64/kernel/idreg-override.c | 3 +- arch/arm64/kernel/image-vars.h | 2 +- arch/arm64/kernel/insn.c | 2 +- arch/arm64/kernel/kaslr.c | 12 ++- arch/arm64/kernel/machine_kexec.c | 25 +++-- arch/arm64/kernel/probes/uprobes.c | 2 +- arch/arm64/kernel/smp.c | 8 +- arch/arm64/kernel/smp_spin_table.c | 7 +- arch/arm64/kernel/sys_compat.c | 2 +- arch/arm64/kvm/arm.c | 2 +- arch/arm64/kvm/hyp/nvhe/cache.S | 4 +- arch/arm64/kvm/hyp/nvhe/setup.c | 3 +- arch/arm64/kvm/hyp/nvhe/tlb.c | 2 +- arch/arm64/kvm/hyp/pgtable.c | 13 ++- arch/arm64/lib/uaccess_flushcache.c | 4 +- arch/arm64/mm/cache.S | 157 ++++++++++++++++------------ arch/arm64/mm/flush.c | 29 ++--- 26 files changed, 261 insertions(+), 193 deletions(-) base-commit: 6efb943b8616ec53a5e444193dccf1af9ad627b5