From patchwork Fri Oct 29 09:36:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "liuqi (BA)" X-Patchwork-Id: 12592319 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1AF52C433EF for ; Fri, 29 Oct 2021 09:38:46 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C575860FC0 for ; Fri, 29 Oct 2021 09:38:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org C575860FC0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=S22OyZ+0aVvMNcW2h3WV4LIsodhqSHlDeQP/cABo5hc=; b=qoy4K90iTas8MN rBLvLOJd63t+/eYT2MmRHAUC3nD7ONX/LZNAy3ydx9c0twR1nW/I9ApES4QDJdEwvxcVP/VgDvSWD VKko+v/zYI3p27dySQiTCcfWpDqsvy9DfrH/v1sfW1BST0mbBMi6ycflwlQhKc3W2N+FoRzL9i2DT tBQuVryaYO8wrw8ANs9h8fmHRIRyYkll6iimfmwWGsY4wVD3c/3NEJCeoODa65Z6xzWTftqjzG/0F WlnwI/9jt9LM8US7t8BskGT7cHZ/dqk3ZqknA57i+SNw5oLfLk1aqtU+tdgeYHc2+dKhp/5qrinYW szvpOJXJQqgFcew2PliQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mgOKE-00AV7K-SP; Fri, 29 Oct 2021 09:37:27 +0000 Received: from szxga01-in.huawei.com ([45.249.212.187]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mgOJp-00AUzJ-Tj for linux-arm-kernel@lists.infradead.org; Fri, 29 Oct 2021 09:37:09 +0000 Received: from dggemv711-chm.china.huawei.com (unknown [172.30.72.55]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4Hgchq5XGyzWj9v; Fri, 29 Oct 2021 17:34:51 +0800 (CST) Received: from kwepemm600003.china.huawei.com (7.193.23.202) by dggemv711-chm.china.huawei.com (10.1.198.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.15; Fri, 29 Oct 2021 17:36:49 +0800 Received: from localhost.localdomain (10.67.165.2) by kwepemm600003.china.huawei.com (7.193.23.202) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.15; Fri, 29 Oct 2021 17:36:48 +0800 From: Qi Liu To: , , CC: , , , , Subject: [PATCH v11 0/2] drivers/perf: hisi: Add support for PCIe PMU Date: Fri, 29 Oct 2021 17:36:30 +0800 Message-ID: <20211029093632.4350-1-liuqi115@huawei.com> X-Mailer: git-send-email 2.33.0 MIME-Version: 1.0 X-Originating-IP: [10.67.165.2] X-ClientProxiedBy: dggems704-chm.china.huawei.com (10.3.19.181) To kwepemm600003.china.huawei.com (7.193.23.202) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211029_023705_810059_31C641CC X-CRM114-Status: GOOD ( 10.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patchset adds support for HiSilicon PCIe Performance Monitoring Unit(PMU). It is a PCIe Root Complex integrated End Point(RCiEP) device added on Hip09. Each PCIe Core has a PMU RCiEP to monitor multi root ports and all Endpoints downstream these root ports. HiSilicon PCIe PMU is supported to collect performance data of PCIe bus, such as: bandwidth, latency etc. Example usage of counting PCIe rx memory write latency:: $# perf stat -e hisi_pcie0_core0/rx_mwr_latency/ $# perf stat -e hisi_pcie0_core0/rx_mwr_cnt/ $# perf stat -g -e hisi_pcie0_core0/rx_mwr_latency/ -e hisi_pcie0_core0/rx_mwr_cnt/ average rx memory write latency can be calculated like this: latency = rx_mwr_latency / rx_mwr_cnt. Common PMU events and metrics will be described in JSON file, and will be add in userspace perf tool latter. Changes since v10: - Drop the out of date comment according to Jonathan's review. - Link: https://lore.kernel.org/linux-arm-kernel/20210915074524.18040-1-liuqi115@huawei.com/ Changes since v9: - Add check in hisi_pcie_pmu_validate_event_group to count counters accurently . - Link: https://lore.kernel.org/linux-arm-kernel/20210818051246.29545-1-liuqi115@huawei.com/ Changes since v8: - Remove subevent parameter in attr->config. - Check the counter scheduling constraints when accepting an event group. - Link: https://lore.kernel.org/linux-arm-kernel/20210728080932.72515-1-liuqi115@huawei.com/ Changes since v7: - Drop headerfile cpumask.h and cpuhotplug.h. - Rename events in perf list: bw->flux, lat->delay, as driver doesn't process bandwidth and average latency data. - Link: https://lore.kernel.org/linux-arm-kernel/1624532384-43002-1-git-send-email-liuqi115@huawei.com/ Changes since v6: - Move the driver to drivers/perf/hisilicon. - Treat content in PMU counter and ext_counter as different PMU events, and export them separately. - Address the comments from Will and Krzysztof. - Link: https://lore.kernel.org/linux-arm-kernel/1622467951-32114-1-git-send-email-liuqi115@huawei.com/ Changes since v5: - Fix some errors when build under ARCH=xtensa. - Link: https://lore.kernel.org/linux-arm-kernel/1621946795-14046-1-git-send-email-liuqi115@huawei.com/ Changes since v4: - Replace irq_set_affinity_hint() with irq_set_affinity(). - Link: https://lore.kernel.org/linux-arm-kernel/1621417741-5229-1-git-send-email-liuqi115@huawei.com/ Changes since v3: - Fix some warnings when build under 32bits architecture. - Address the comments from John. - Link: https://lore.kernel.org/linux-arm-kernel/1618490885-44612-1-git-send-email-liuqi115@huawei.com/ Changes since v2: - Address the comments from John. - Link: https://lore.kernel.org/linux-arm-kernel/1617959157-22956-1-git-send-email-liuqi115@huawei.com/ Changes since v1: - Drop the internal Reviewed-by tag. - Fix some build warnings when W=1. - Link: https://lore.kernel.org/linux-arm-kernel/1617788943-52722-1-git-send-email-liuqi115@huawei.com/ Qi Liu (2): docs: perf: Add description for HiSilicon PCIe PMU driver drivers/perf: hisi: Add driver for HiSilicon PCIe PMU .../admin-guide/perf/hisi-pcie-pmu.rst | 106 ++ MAINTAINERS | 2 + drivers/perf/hisilicon/Kconfig | 9 + drivers/perf/hisilicon/Makefile | 2 + drivers/perf/hisilicon/hisi_pcie_pmu.c | 948 ++++++++++++++++++ include/linux/cpuhotplug.h | 1 + 6 files changed, 1068 insertions(+) create mode 100644 Documentation/admin-guide/perf/hisi-pcie-pmu.rst create mode 100644 drivers/perf/hisilicon/hisi_pcie_pmu.c