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Tue, 7 Dec 2021 12:42:44 +0000 From: Joey Gouly To: CC: , , , , , , , , , Subject: [PATCH v2 0/3] arm64: Add two HWCAPs for Arm v8.7 FP behaviour Date: Tue, 7 Dec 2021 12:42:23 +0000 Message-ID: <20211207124226.50095-1-joey.gouly@arm.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-Office365-Filtering-Correlation-Id: fa8e12e1-02f9-456d-c701-08d9b97f1da0 X-MS-TrafficTypeDiagnostic: AM8PR08MB6580:EE_|DB5EUR03FT015:EE_|DB9PR08MB6843: X-Microsoft-Antispam-PRVS: x-checkrecipientrouted: true NoDisclaimer: true X-MS-Oob-TLC-OOBClassifiers: OLM:8273;OLM:8273; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: ZYe5CU+Tuqq5di836Rfy04KEUq7Vp4ag15i6SzYDVeiz+FIaNB+0y4/NwyvLksXqNXj8YRrtWO/gMfl7LayJ88CR5i8xIm16L7lyYJ4jU4fxbfztB9ct8e36WqkdWBuOAetEFnk0YuvJtUn07zJbECmxO66jYUbKMsJFm2HWulghuVlPZR8DiXOqWYRUDyu6TISzPid0Gk/AlakTbdJEi0cu9uaroUYGIqtIKvG03u/e+HFOXK0Kx+Dh7fMCAeqrncVJ7AICk2ZCmFskQf/r1EAl5x8E3YWY8U2HV/8AwYCbjHWEad3WTDgeeRvvXdpIN+8o/9jxiyu19JcUVRbqj5rcvCsDeljGdBncUm0f8IpgvC37em3ysi1JPGnDwIvcRnW1QHtqkNlAIjNqWadhoNEWdrnFa7YDp5uLz9r5HqrKMaqaUojVvhzt5a+C1PySLNgXvi+EJ6QrRjWw5RAHK+hDEOQ/8uVcfatY/Q4+yrfaMxWoqKNpXgBcwGMEkfhx2OBipDqeCvmSGiN1qRxyuwNuwEJBZFe4MJT7Gy46u0ZuFG94spEOc/RFmmgbDs4c0HSjnzLJU8KxNLny0tWwK+uO4lEP9HBJgagrK7tZX73GeTDMrbdJ3tVff3M4xRUtmdJbXnXl/HRSX7iYySbi6DLohBGkjB1eydhwqDtSWCBztrfWL9PBlPkne9PklaQ3lQ/6caA0NG8XQ2f71jl+CPM6D9adhTHk0+hsPkD3wCKvspzohLbdhlUL0Z8GgqTVVxOyexzImY4wdU6F8FbIKh4RZbEHA9gaQJmfjqhOjNk= X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234; 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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(4636009)(46966006)(36840700001)(36756003)(7696005)(6916009)(81166007)(47076005)(36860700001)(6666004)(2906002)(44832011)(5660300002)(70206006)(86362001)(186003)(70586007)(82310400004)(54906003)(2616005)(26005)(426003)(8676002)(8936002)(4326008)(316002)(508600001)(1076003)(336012)(107886003)(83380400001); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Dec 2021 12:43:05.8617 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fa8e12e1-02f9-456d-c701-08d9b97f1da0 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DB5EUR03FT015.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB6843 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211207_044311_022127_06C5A8DC X-CRM114-Status: GOOD ( 10.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series adds new HWCAPs for two Arm v8.7 features: - FEAT_AFP: Alternate floating-point behavior for specific floating point instructions. - FEAT_RPRES: Increased precision of Reciprocal Estimate and Reciprocal Square Root Estimate from an 8-bit mantissa to a 12-bit mantissa. These features can be enabled by userspace by setting some new bits in FPCR. These new bits are FPCR.{NEP, AH, FIZ}. Since these must be explicitly enabled by userspace, this should not affect existing applications. This has been tested with: - FVP: combinations of both features, including mismatched CPUs - qemu: regression test, neither feature is supported - juno: regression test, neither feature is supported Changes since v1 [1]: - Switch WFxT supported bit to the new value in ID_AA64ISAR2_EL1 Thanks, Joey Joey Gouly (3): arm64: cpufeature: add HWCAP for FEAT_AFP arm64: add ID_AA64ISAR2_EL1 sys register arm64: cpufeature: add HWCAP for FEAT_RPRES Documentation/arm64/cpu-feature-registers.rst | 17 +++++++++++++++++ Documentation/arm64/elf_hwcaps.rst | 8 ++++++++ arch/arm64/include/asm/cpu.h | 1 + arch/arm64/include/asm/hwcap.h | 2 ++ arch/arm64/include/asm/sysreg.h | 11 +++++++++++ arch/arm64/include/uapi/asm/hwcap.h | 2 ++ arch/arm64/kernel/cpufeature.c | 13 +++++++++++++ arch/arm64/kernel/cpuinfo.c | 3 +++ arch/arm64/kvm/sys_regs.c | 2 +- 9 files changed, 58 insertions(+), 1 deletion(-)