From patchwork Tue Jan 11 13:06:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 12709849 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F364AC433F5 for ; Tue, 11 Jan 2022 13:08:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=NlMtLBu6TILvQvxHbn897I0XUM8PkPIQRqbEWeZT80w=; b=A8ZjRD2IFEGuZL 1p/730l9q/KyH4vBXUpQsUy1PNHVg2pvAfD0QZ18kr1aZiGYZJYl4sypGAeAMKP6tTdbyfdScY1oB +UkeWYBXGPRCjGYyZPC+ra21xwLa/VHRkYYUJrOwZcZ5M1UJ9eiMp1V9NzjE8EY8K+8L5jkIQ6ysE VYtc6k8Emu6RsMqQaiQ77XNZCF6J/cIOL+/PAfj7QiNx/scTPFyTAjLDbb0T8RkXv/1zoACvsQ1wB ronSiFBi2OLgJftitE6tTUVEFYKB3p88oPZMQPScxVIMcn32E77oir1sEVDqnFWildrC6wu+TXmHU DartySEn5yQD+A8TQ9Wg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n7Grl-00GIDH-J0; Tue, 11 Jan 2022 13:07:09 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n7Grg-00GIBS-Ca for linux-arm-kernel@lists.infradead.org; Tue, 11 Jan 2022 13:07:07 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3F8C41FB; Tue, 11 Jan 2022 05:07:03 -0800 (PST) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 72A813F774; Tue, 11 Jan 2022 05:07:02 -0800 (PST) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Cc: andre.przywara@arm.com, Jaxson.Han@arm.com, mark.rutland@arm.com, Wei.Chen@arm.com Subject: [bootwrapper PATCH 00/13] Cleanups and improvements Date: Tue, 11 Jan 2022 13:06:40 +0000 Message-Id: <20220111130653.2331827-1-mark.rutland@arm.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220111_050704_551068_2BC6D956 X-CRM114-Status: GOOD ( 19.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series reworks the aarch64 boot-wrapper, moving a fair amount of initialization code to C. This has a few benefits: 1) This makes the code more legible and easier to maintain. Current feature detection and system register configuration is written in assembly, requiring runs of *almost* identical blocks of assembly to read ID registers and conditionally initialize register values. This requires a bunch of labels (which are all named numerically), and all the magic numbers are hard coded, so this gets pretty painful to read: | mrs x1, id_aa64isar0_el1 | ubfx x1, x1, #24, #4 | cbz x1, 1f | | orr x0, x0, #(1 << 34) // TME enable | | 1: In C, it's much easier to add helpers which use mnemonics, which makes the code much easier to read, and avoids the need to manually allocate registers, etc: | if (mrs_field(ID_AA64ISAR0_EL1, TME)) | scr |= SCR_EL3_TME; This should make it easier to handle new architectural extensions (and/or architecture variants such as ARMv8-R) in future. 2) This allows for better diagnostics. Currently a mis-configured boot-wrapper is rather unforgiving, and provides no indication as to what might have gone wrong. By moving initialization to C, we can make use to the UART code to log diagnostic information, and we can more easily add additional error handling and conditional logic. This series adds diagnostic information and error handling that can be used to identify problems such as the boot-wrapper being launched at the wrong exception level: | Boot-wrapper v0.2 | Entered at EL2 | Memory layout: | [0000000080000000..0000000080001f90] => boot-wrapper | [000000008000fff8..0000000080010000] => mbox | [0000000080200000..00000000822af200] => kernel | [0000000088000000..0000000088002857] => dtb | | WARNING: PSCI could not be initialized. Boot may fail Originally I had planned for this to be a more expansive set of changes, unifying some early control-flow, fixing some latent bugs, and making the boot-wrapper dynamically handle being entered at any of EL{3,2,1} with automated selection of a suitable DT. As the series has already become pretty long, I'd like to get this preparatory cleanup out of the way first, and handle those cases with subsequent patches. If there are no objections in the next few days, I intend to apply these patches by the end of the week. If people can provide Reviewed-by and Tested-by tags, I'd be happy to apply this earlier. I've pushed the series to the `cleanup` branch in the boot-wrapper repo: https://git.kernel.org/pub/scm/linux/kernel/git/mark/boot-wrapper-aarch64.git/ git://git.kernel.org/pub/scm/linux/kernel/git/mark/boot-wrapper-aarch64.git ... and it should apply cleanup atop the `master` branch. Thanks, Mark. Mark Rutland (13): Document entry requirements Add bit-field macros aarch64: add system register accessors aarch32: add coprocessor accessors aarch64: add mov_64 macro aarch64: initialize SCTLR_ELx for the boot-wrapper Rework common init C code Announce boot-wrapper mode / exception level aarch64: move the bulk of EL3 initialization to C aarch32: move the bulk of Secure PL1 initialization to C Announce locations of memory objects Rework bootmethod initialization Unify start_el3 & start_no_el3 Makefile.am | 6 +- arch/aarch32/boot.S | 33 +++--- arch/aarch32/include/asm/cpu.h | 62 ++++++++--- arch/aarch32/include/asm/gic-v3.h | 6 +- arch/aarch32/include/asm/psci.h | 28 +++++ arch/aarch32/init.c | 42 ++++++++ arch/aarch32/psci.S | 13 +-- arch/aarch32/utils.S | 9 -- arch/aarch64/boot.S | 169 +++++++++++++----------------- arch/aarch64/common.S | 10 +- arch/aarch64/include/asm/cpu.h | 102 +++++++++++++++--- arch/aarch64/include/asm/gic-v3.h | 10 +- arch/aarch64/include/asm/psci.h | 28 +++++ arch/aarch64/init.c | 88 ++++++++++++++++ arch/aarch64/psci.S | 22 +--- arch/aarch64/spin.S | 3 + arch/aarch64/utils.S | 9 -- common/boot.c | 4 - common/init.c | 60 +++++++++++ common/platform.c | 46 +++++--- common/psci.c | 22 +++- include/bits.h | 33 ++++++ include/boot.h | 2 + include/platform.h | 20 ++++ model.lds.S | 20 ++-- 25 files changed, 621 insertions(+), 226 deletions(-) create mode 100644 arch/aarch32/include/asm/psci.h create mode 100644 arch/aarch32/init.c create mode 100644 arch/aarch64/include/asm/psci.h create mode 100644 arch/aarch64/init.c create mode 100644 common/init.c create mode 100644 include/bits.h create mode 100644 include/platform.h