mbox series

[v2,0/4] arm64: Support of PAuth QARMA3 architected algorithm

Message ID 20220131170654.62381-1-vladimir.murzin@arm.com (mailing list archive)
Headers show
Series arm64: Support of PAuth QARMA3 architected algorithm | expand

Message

Vladimir Murzin Jan. 31, 2022, 5:06 p.m. UTC
QARMA3 is relaxed version of the QARMA5 algorithm which expected to
reduce the latency of calculation while still delivering a suitable
level of security.

Feature advertised via a new ID fields in ID_AA64ISAR2_EL1 [1], so we
need to teach the kernel to identify this.

[1] https://developer.arm.com/documentation/ddi0601/2021-12/AArch64-Registers/ID-AA64ISAR2-EL1--AArch64-Instruction-Set-Attribute-Register-2?lang=en


Changelog:

  v1 -> v2
     - Removed unintended whitespace change in sysreg.h
     - FTR_ALIAS_OPTION_LEN now accounts null terminator
     - Extract only APA3 bits from ID_AA64ISAR2_APA3_SHIFT (in
       contrast to id_aa64isar1_el1 where both APA and API bits
       are extracted) in asm_pointer_auth.h

Thanks!

Vladimir Murzin (4):
  arm64: cpufeature: Account min_field_value when cheking secondaries
    for PAuth
  arm64: cpufeature: Warn if mutually exclusive PAuth algorithms
    detected
  arm64: cpufeature: Mark existing PAuth architected algorithm as QARMA5
  arm64: Add support of PAuth QARMA3 architected algorithm

 arch/arm64/include/asm/asm_pointer_auth.h      |  3 ++
 arch/arm64/include/asm/cpufeature.h            |  1 +
 arch/arm64/include/asm/kvm_hyp.h               |  1 +
 arch/arm64/include/asm/sysreg.h                | 12 +++++
 arch/arm64/kernel/cpufeature.c                 | 63 ++++++++++++++++++++++----
 arch/arm64/kernel/idreg-override.c             | 16 ++++++-
 arch/arm64/kvm/arm.c                           |  1 +
 arch/arm64/kvm/hyp/include/nvhe/fixed_config.h |  5 ++
 arch/arm64/kvm/hyp/nvhe/sys_regs.c             | 14 ++++++
 arch/arm64/kvm/sys_regs.c                      |  5 ++
 arch/arm64/tools/cpucaps                       |  6 ++-
 11 files changed, 114 insertions(+), 13 deletions(-)

Comments

Vladimir Murzin Jan. 31, 2022, 5:38 p.m. UTC | #1
On 1/31/22 5:06 PM, Vladimir Murzin wrote:
> QARMA3 is relaxed version of the QARMA5 algorithm which expected to
> reduce the latency of calculation while still delivering a suitable
> level of security.
> 
> Feature advertised via a new ID fields in ID_AA64ISAR2_EL1 [1], so we
> need to teach the kernel to identify this.
> 
> [1] https://developer.arm.com/documentation/ddi0601/2021-12/AArch64-Registers/ID-AA64ISAR2-EL1--AArch64-Instruction-Set-Attribute-Register-2?lang=en
> 
> 
> Changelog:
> 
>   v1 -> v2
>      - Removed unintended whitespace change in sysreg.h
>      - FTR_ALIAS_OPTION_LEN now accounts null terminator
>      - Extract only APA3 bits from ID_AA64ISAR2_APA3_SHIFT (in
                                     ^^^^^^^^^^^^^^^^^^^^^^^
                                   should be read as ID_AA64ISAR2

>        contrast to id_aa64isar1_el1 where both APA and API bits
>        are extracted) in asm_pointer_auth.h
> 
> Thanks!
> 
> Vladimir Murzin (4):
>   arm64: cpufeature: Account min_field_value when cheking secondaries
>     for PAuth
>   arm64: cpufeature: Warn if mutually exclusive PAuth algorithms
>     detected
>   arm64: cpufeature: Mark existing PAuth architected algorithm as QARMA5
>   arm64: Add support of PAuth QARMA3 architected algorithm
> 
>  arch/arm64/include/asm/asm_pointer_auth.h      |  3 ++
>  arch/arm64/include/asm/cpufeature.h            |  1 +
>  arch/arm64/include/asm/kvm_hyp.h               |  1 +
>  arch/arm64/include/asm/sysreg.h                | 12 +++++
>  arch/arm64/kernel/cpufeature.c                 | 63 ++++++++++++++++++++++----
>  arch/arm64/kernel/idreg-override.c             | 16 ++++++-
>  arch/arm64/kvm/arm.c                           |  1 +
>  arch/arm64/kvm/hyp/include/nvhe/fixed_config.h |  5 ++
>  arch/arm64/kvm/hyp/nvhe/sys_regs.c             | 14 ++++++
>  arch/arm64/kvm/sys_regs.c                      |  5 ++
>  arch/arm64/tools/cpucaps                       |  6 ++-
>  11 files changed, 114 insertions(+), 13 deletions(-)
>
Marc Zyngier Feb. 5, 2022, 10:27 a.m. UTC | #2
On Mon, 31 Jan 2022 17:06:50 +0000,
Vladimir Murzin <vladimir.murzin@arm.com> wrote:
> 
> QARMA3 is relaxed version of the QARMA5 algorithm which expected to
> reduce the latency of calculation while still delivering a suitable
> level of security.
> 
> Feature advertised via a new ID fields in ID_AA64ISAR2_EL1 [1], so we
> need to teach the kernel to identify this.
> 
> [1] https://developer.arm.com/documentation/ddi0601/2021-12/AArch64-Registers/ID-AA64ISAR2-EL1--AArch64-Instruction-Set-Attribute-Register-2?lang=en
> 
> 
> Changelog:
> 
>   v1 -> v2
>      - Removed unintended whitespace change in sysreg.h
>      - FTR_ALIAS_OPTION_LEN now accounts null terminator
>      - Extract only APA3 bits from ID_AA64ISAR2_APA3_SHIFT (in
>        contrast to id_aa64isar1_el1 where both APA and API bits
>        are extracted) in asm_pointer_auth.h
> 
> Thanks!
> 
> Vladimir Murzin (4):
>   arm64: cpufeature: Account min_field_value when cheking secondaries
>     for PAuth
>   arm64: cpufeature: Warn if mutually exclusive PAuth algorithms
>     detected
>   arm64: cpufeature: Mark existing PAuth architected algorithm as QARMA5
>   arm64: Add support of PAuth QARMA3 architected algorithm

For the series:

Reviewed-by: Marc Zyngier <maz@kernel.org>

	M.