From patchwork Tue Mar 15 18:23:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Morse X-Patchwork-Id: 12781724 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1630AC433F5 for ; Tue, 15 Mar 2022 18:25:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=3e2bj33B0mYbBFd7yM1rlIj/ywlHaTaghHVJcG/0iMo=; b=LmCJLg4CT4nFPk SBLQl3jsGasnqTFCbdNi+c+/t/g2sJGK2bY2jZG/PdqtUYtSW0j4ECh+8u+AgvqpzCb8b4r4xYokN Kh3CikjBQc0xe0g5jWuGLJbnqDU7vVRSTjEcWx2Kd0WYvsvsML/gPSFIahz6Hkpqc7kaG/NmNnAQ9 IWK24Ijvqw+Cla2Ua/ZjX/6zfxUXBBtPmt+R0G0x0Vt8eQZd0r1sOsNPnHO8uyv9QM4mj02mjAx8y ue7lZMCYY7hP6pIvgE1PqWy+dnIenaxx/Korhc5vlnVjX00sgXAP6ZDtNdcLQy/bo30CaZsgpv1jC I+7oM4b07HrwhkKP+Yjw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUBqP-00ABae-Cc; Tue, 15 Mar 2022 18:24:29 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUBqL-00ABa2-Er for linux-arm-kernel@lists.infradead.org; Tue, 15 Mar 2022 18:24:27 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3AB9A1474; Tue, 15 Mar 2022 11:24:22 -0700 (PDT) Received: from eglon.cambridge.arm.com (eglon.cambridge.arm.com [10.1.196.218]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8DEC93F73D; Tue, 15 Mar 2022 11:24:21 -0700 (PDT) From: James Morse To: stable@vger.kernel.org Cc: catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org, james.morse@arm.com Subject: [stable:PATCH v5.4.184 00/22] arm64: Mitigate spectre style branch history side channels Date: Tue, 15 Mar 2022 18:23:53 +0000 Message-Id: <20220315182415.3900464-1-james.morse@arm.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220315_112425_633459_CCADA7B5 X-CRM114-Status: GOOD ( 18.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Greg, Here is the state of the current v5.4 backport. Now that the 32bit code has been merged, it doesn't conflict when KVM's shared 32bit/64bit code needs to use these constants. I've fixed the two issues that were reported against the v5.10 backport. I had a go at bringing all the pre-requisites in to add proton-pack.c to v5.4. Its currently 39 patches: https://git.gitlab.arm.com/linux-arm/linux-jm.git /bhb/alternative_backport/UNTESTED/v5.4.183 (or for web browsers: https://gitlab.arm.com/linux-arm/linux-jm/-/commits/bhb/alternative_backport/UNTESTED/v5.4.183/ ) I've not managed to bring b881cdce77b4 "KVM: arm64: Allocate hyp vectors statically" in, as that depends on the hypervisor's per-cpu support. Its this patch that means those 'smccc_wa' templates are needed. I estimate it would be 60 patches in total if we go this way, I don't think its a good idea: All this still has to work around 541ad0150ca4 ("arm: Remove 32bit KVM host support") and 9ed24f4b712b ("KVM: arm64: Move virt/kvm/arm to arch/arm64") being missing. I think this approach creates more problems than it solves as the files have to be in different places because of 32bit. It also creates a significantly larger testing problem: I'm not looking forward to working out how to test KVM guest migration over the variant-4 KVM ABI changes in 29e8910a566a. This version of the backport still adds the mitigation management code to cpu_errata.c, because that is where this stuff lived in v5.4. If you prefer, I can try adding proton-pack.c as a new empty file. I think this would only confuse matters as the line-numbers would never match, and there is an interaction with the spectre-v2 mitigations that live in cpu_errata.c. There is one patch not present in mainline 'KVM: arm64: Add templtes for BHB mitigation sequences'. Thanks, James Anshuman Khandual (1): arm64: Add Cortex-X2 CPU part definition James Morse (18): arm64: entry.S: Add ventry overflow sanity checks arm64: entry: Make the trampoline cleanup optional arm64: entry: Free up another register on kpti's tramp_exit path arm64: entry: Move the trampoline data page before the text page arm64: entry: Allow tramp_alias to access symbols after the 4K boundary arm64: entry: Don't assume tramp_vectors is the start of the vectors arm64: entry: Move trampoline macros out of ifdef'd section arm64: entry: Make the kpti trampoline's kpti sequence optional arm64: entry: Allow the trampoline text to occupy multiple pages arm64: entry: Add non-kpti __bp_harden_el1_vectors for mitigations arm64: entry: Add vectors that have the bhb mitigation sequences arm64: entry: Add macro for reading symbol addresses from the trampoline arm64: Add percpu vectors for EL1 arm64: proton-pack: Report Spectre-BHB vulnerabilities as part of Spectre-v2 KVM: arm64: Add templates for BHB mitigation sequences arm64: Mitigate spectre style branch history side channels KVM: arm64: Allow SMCCC_ARCH_WORKAROUND_3 to be discovered and migrated arm64: Use the clearbhb instruction in mitigations Joey Gouly (1): arm64: add ID_AA64ISAR2_EL1 sys register Rob Herring (1): arm64: Add part number for Arm Cortex-A77 Suzuki K Poulose (1): arm64: Add Neoverse-N2, Cortex-A710 CPU part definition arch/arm/include/asm/kvm_host.h | 7 + arch/arm/include/uapi/asm/kvm.h | 6 + arch/arm64/Kconfig | 9 + arch/arm64/include/asm/assembler.h | 33 +++ arch/arm64/include/asm/cpu.h | 1 + arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/cpufeature.h | 40 +++ arch/arm64/include/asm/cputype.h | 16 ++ arch/arm64/include/asm/fixmap.h | 6 +- arch/arm64/include/asm/kvm_host.h | 5 + arch/arm64/include/asm/kvm_mmu.h | 6 +- arch/arm64/include/asm/mmu.h | 8 +- arch/arm64/include/asm/sections.h | 5 + arch/arm64/include/asm/sysreg.h | 17 ++ arch/arm64/include/asm/vectors.h | 73 ++++++ arch/arm64/include/uapi/asm/kvm.h | 5 + arch/arm64/kernel/cpu_errata.c | 385 +++++++++++++++++++++++++++- arch/arm64/kernel/cpufeature.c | 21 ++ arch/arm64/kernel/cpuinfo.c | 1 + arch/arm64/kernel/entry.S | 213 +++++++++++---- arch/arm64/kernel/vmlinux.lds.S | 2 +- arch/arm64/kvm/hyp/hyp-entry.S | 64 +++++ arch/arm64/kvm/hyp/switch.c | 8 +- arch/arm64/kvm/sys_regs.c | 2 +- arch/arm64/mm/mmu.c | 12 +- include/linux/arm-smccc.h | 5 + virt/kvm/arm/psci.c | 34 ++- 27 files changed, 912 insertions(+), 75 deletions(-) create mode 100644 arch/arm64/include/asm/vectors.h