From patchwork Wed May 4 07:51:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hector Martin X-Patchwork-Id: 12837274 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62C07C433EF for ; Wed, 4 May 2022 07:53:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=bgyXVAHWFo0fuYJIi/XmD2/Plwmq2TKcHdv+KxfNuWk=; b=2E3CoEIqEyrSZc AB3T6gD61sEMoyfo1Bo2kAgzzT903b0N0JH5PIWb86PRzu6stMZjDDSFKDClXIVy1LtU1Rw8WRKDW O+z/yTDS7GrPVeJZkTQ3SflFTusWoVt4qTFG9SjiQl37MnRjvPp9Osdu7kA+hoQTaqp5/MjdUbPWm sqTxs8F3nochQxFIwy4S03k5cQbk1eQ9Kwu8bM3sn0pdObBksyWdux0uBFuQmWq48rXKq0xlouofy /YVfJJ9oRSNPhT9cFphNtnxTuNik5MjILaQBK0rHIM5RRFZnDolNS/6BDTx6uDmR77g2K+r6sq/O9 rM8lCOfWlHqQzgu5/7QQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nm9nz-009LLI-7q; Wed, 04 May 2022 07:52:15 +0000 Received: from marcansoft.com ([212.63.210.85] helo=mail.marcansoft.com) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nm9nv-009LIf-4G for linux-arm-kernel@lists.infradead.org; Wed, 04 May 2022 07:52:13 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: hector@marcansoft.com) by mail.marcansoft.com (Postfix) with ESMTPSA id E009741E64; Wed, 4 May 2022 07:52:00 +0000 (UTC) From: Hector Martin To: "Rafael J. Wysocki" , Viresh Kumar Cc: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Stephen Boyd , Ulf Hansson , Marc Zyngier , Mark Kettenis , linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/4] Apple SoC cpufreq driver Date: Wed, 4 May 2022 16:51:49 +0900 Message-Id: <20220504075153.185208-1-marcan@marcan.st> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220504_005211_356175_C965FBBB X-CRM114-Status: GOOD ( 17.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi folks, Here's a second take on the cpufreq driver for Apple SoCs. This is a complete rewrite using a stand-alone cpufreq driver instead of using the cpufreq-dt infrastructure. Since v1 we ran some experiments on the memory controller performance switching and it turns out it doesn't make a huge difference, so it makes sense to punt that feature to the future (perhaps once a proper memory controller driver exists for other reasons, e.g. for error handling). One advantage of having a standalone cpufreq driver is that we can support fast switching. This also means any future interaction with the memory controller will probably use some bespoke mechanism instead of the genpd infrastructure, so we can keep the fast path without allowing sleeps/etc. The driver is based on scpi-cpufreq.c, with some bits (e.g. the apple,freq-domain stuff) inspired by how cpufreq-qcom-hw does it. I'm not sure if that particular property should be described in a binding, since it goes in the cpu nodes (qcom doesn't have it anywhere...). Changes since v1: - Complete rewrite - Reports current frequency to userspace properly (incl. if different from requested due to hardware constraints) - Supports fast switching - MCC latency control stuff no longer included, punted for later - Supports exposing higher states as turbo states Hector Martin (4): MAINTAINERS: Add entries for Apple SoC cpufreq driver dt-bindings: cpufreq: apple,soc-cpufreq: Add binding for Apple SoC cpufreq cpufreq: apple-soc: Add new driver to control Apple SoC CPU P-states arm64: dts: apple: Add CPU topology & cpufreq nodes for t8103 .../bindings/cpufreq/apple,soc-cpufreq.yaml | 121 +++++++ MAINTAINERS | 2 + arch/arm64/boot/dts/apple/t8103.dtsi | 203 ++++++++++- drivers/cpufreq/Kconfig.arm | 9 + drivers/cpufreq/Makefile | 1 + drivers/cpufreq/apple-soc-cpufreq.c | 330 ++++++++++++++++++ drivers/cpufreq/cpufreq-dt-platdev.c | 2 + 7 files changed, 658 insertions(+), 10 deletions(-) create mode 100644 Documentation/devicetree/bindings/cpufreq/apple,soc-cpufreq.yaml create mode 100644 drivers/cpufreq/apple-soc-cpufreq.c