From patchwork Fri May 6 08:23:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12840756 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 66AB0C433EF for ; Fri, 6 May 2022 08:28:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=f8WAHrNgYLw8tl8JqK8Yu+fo71Poa9JfUuhgZqZSOC4=; b=BgBNxCKbnszSOl wmSjvj5zJOFNMrF0gVUC0sPYPs029CFNZKoew7FHbGSIbL2wuffaVAVbvfET8hkb5OLnd5Gq59fS3 nXc5tdyrFdMzEphWjb9oikDGLViAxCEynI/0T0hFfA9SejY4DXT3zDrDD/YtjH+wM5oOUm+MCYoIy hJU9cTZpIxt6zdsvd0HUVPDbhgczEcaCZxt/equIzUqNvFTdTmabj2BZUt2HbHpNg6WgLYBrpL528 C1VzpH/maq4l4IsZjEROZkiJ5Ph7bUTksiMiVAR1MaZuNc3uuFpjF9Tx1KxE18Kxx0ozK5fopFBBU dhHfbJP0EbcVNwcAWzkg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmtIX-0024qM-RO; Fri, 06 May 2022 08:26:50 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmtD9-0022ay-Cg for linux-arm-kernel@lists.infradead.org; Fri, 06 May 2022 08:21:16 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1651825276; x=1683361276; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=SWCtzeQzV0HfQf38xk+FbMTpoar7gBWKe/96+FRMtXQ=; b=Pv+d85Oqkh/nXuXMywpKmUKMV/8FUEHKBG/hmVq1Lc7kZmAXYzIjX86q ioIFXOcoLKAMIF6iDz8yd1LO36sLZtp+5itjea/sdYSMnDrFTV3IwiEWQ shYfnTVaCYRv9IXHTQFIiZZ4p9jktXgldP74sPZi8a9a6E2BVlAS9VrPM uiTKSVedRQHQt1Nss18Dwa/0p9++QtEfI3jlFkRHbOE9RNltsByMmWWRF 2DrmNuYIazbWHrViOc8V/APfY9ZJgLW37h7A+zTTQ+CY0+hWJZCQyt3FF wQQiGy7h+n5M7tzpLzpwP93epPpFEjLDCo9XaoxiwYlbLuzmkDueE+hU/ A==; X-IronPort-AV: E=Sophos;i="5.91,203,1647327600"; d="scan'208";a="155031257" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 06 May 2022 01:21:15 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Fri, 6 May 2022 01:21:13 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Fri, 6 May 2022 01:21:11 -0700 From: Claudiu Beznea To: , , CC: , , Claudiu Beznea Subject: [PATCH v3 0/4] ARM: at91: pm: add quirks for ethernet Date: Fri, 6 May 2022 11:23:31 +0300 Message-ID: <20220506082335.3817259-1-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220506_012115_587196_E8BE45EB X-CRM114-Status: GOOD ( 10.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, As described in patch 4/4 when receiving WoL packet on Ethernet interfaces of AT91 SoCs and being in ULP0 or ULP1 AT91 specific power management modes some SoCs may block other may have Ethernet interfaces broken after resume. Workaround for this would be to disable clocks for these Ethernet interfaces. As the MACB driver is common to multiple vendors and multiple architectures and ULP0, ULP1 PM modes are AT91 specific the fix has been implemented in arch/arm/mach-at91 to avoid having AT91 specific code in MACB driver. Along with this patches I took the chance and added few comment style fixups. Thank you, Claudiu Beznea Changes in v3: - patch 3/4 is now patch 4/4, patch 4/4 is now patch 3/4 - in patch 4/4: - improve failure path in at91_pm_config_quirks() - pass struct at91_pm_quirk_eth object to at91_pm_eth_quirk_is_valid() - add struct device member to struct at91_pm_quirk_eth - guard for_each_wakeup_source() with CONFIG_PM_SLEEP fixing the compilation error Reported-by: kernel test robot Changes in v2: - in patch 4/4: use proper structure name in documentation Claudiu Beznea (4): ARM: at91: pm: keep documentation inline with structure members ARM: at91: pm: introduce macros for pm mode replacement ARM: at91: pm: use kernel documentation style ARM: at91: pm: add quirks for pm arch/arm/mach-at91/pm.c | 395 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 362 insertions(+), 33 deletions(-)