From patchwork Tue May 10 09:44:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12844738 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0CEDFC433F5 for ; Tue, 10 May 2022 09:44:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=zpcSAYDOiyKo7IEXiDR+bP6ZOncRyYsBg7iJDxbHMlU=; b=l/RKu0ZBEgEp+C XxoDMIUCcihNCAZMmxsbWMCggsiHxLZExuXtefbZtYgS86TPwyGTc0bouymffRYHUXSq00b3jH7US yrPPNliW1Ofeg3ggFOqu45MEHlKxp6MVhH1mdx2+Sd7YlGaprpwsWumKCBfld90SYWL9PtPWj+J9M Lw2nztjIosHwPvj6EyYtfz2PxbRuH7x7MVPCHMYV6HG0FhXX3DQX1zaOFK2BeZQeQz7iA69T6QNjg vIoBxR47LI3ufSDYhHibJ8hLReiyVX74Rm2igNIL0y4Jook/PmWyJp4JztNvmukfkRRKIUmyZmDp1 hjUojQ//YF6JAOGI0Hfw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1noMOV-000uxt-Vq; Tue, 10 May 2022 09:43:04 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1noMO8-000unD-EU for linux-arm-kernel@lists.infradead.org; Tue, 10 May 2022 09:42:43 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1652175760; x=1683711760; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=3SQU+ux0v40mWiICOuSb3MrGZXvqywlzRt9MhD618Eo=; b=hfvew4xzkks0aSmWms82DXuhKtVOtrRNUCJidiZsRDPR7IIBMxoUeDrV oay/ZC0MsJtM5uAJ4seaZZZB67e7qyx77UDawy61jEHzXAKFk9iqugUE1 zOeEx0O97hn+OVeti28DlTiCRoQ7b+SkNOgZBzp44N+I5iqdaoUF3kpAU SG22vcjYt4lK2YidEjPLpU3cmInu92U/HetRGcapcFalCYakI1APo9bvO BwiFzUbKVWILkp47+hbiaF8u+/GPvvWUopXGGhYbIun3/38rPoauoqCG9 RLFW2DlHixNtOKQ92qanXioWWw/LGj3xpMnkn4sjBWfHObTg+xDPXZuSi g==; X-IronPort-AV: E=Sophos;i="5.91,214,1647327600"; d="scan'208";a="95155285" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 10 May 2022 02:42:34 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Tue, 10 May 2022 02:42:33 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Tue, 10 May 2022 02:42:32 -0700 From: Claudiu Beznea To: , , CC: , , , Claudiu Beznea Subject: [PATCH 0/2] nvmem: add Microchip OTP controller Date: Tue, 10 May 2022 12:44:55 +0300 Message-ID: <20220510094457.4070764-1-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220510_024240_598528_6164783F X-CRM114-Status: UNSURE ( 8.73 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, This series adds support for Microchip OTP controller available on SAMA7G5. The driver gives access to a non-volatile memory which keeps (at the moment) information like booting media and temperature calibration data used for thermal measurements. Thank you, Claudiu Beznea Claudiu Beznea (2): dt-bindings: microchip-otpc: document Microchip OTPC nvmem: microchip-otpc: add support .../bindings/nvmem/microchip-otpc.yaml | 55 ++++ MAINTAINERS | 8 + drivers/nvmem/Kconfig | 7 + drivers/nvmem/Makefile | 2 + drivers/nvmem/microchip-otpc.c | 288 ++++++++++++++++++ include/dt-bindings/nvmem/microchip,otpc.h | 18 ++ 6 files changed, 378 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/microchip-otpc.yaml create mode 100644 drivers/nvmem/microchip-otpc.c create mode 040000 include/dt-bindings/nvmem create mode 100644 include/dt-bindings/nvmem/microchip,otpc.h