From patchwork Tue May 17 12:58:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12852462 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 84E49C433F5 for ; Tue, 17 May 2022 13:09:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=4sJnvfLCT02skf2eRwZyNoyuh8QWdBru9haUBSLKtv0=; b=NFe1YrT+7/tlb2 Rf7IfDoEtTWLT8eVx2wLpfoutGZWi1LOOPBCKZGhVF6YBFTLLYLPQPjTEQWb5v5/+/BVrQUyVqE0A +8t1nvobjphuKLYGKb/988RNiK0Qj7E4CZHebaDjYNInGsbx0EazcX6gO4e5pTJ2SKN9+iYpkDqdm fe3OG26X6OgZbtyvkWLRnTKOAFO+i7vGj/K+jk9ja9Q3ugGdC7VzlQbQ2qauAzvfT40jrwy16FYJW gsJalGD7x5vVPnZjGbOibNIhxFomPvN35vSHq48PlpDlJWd4wUYCvJCsHPVY/UHcmG3PBYyuxrCWz pX1iUXhaYO4slaToQfjg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nqwvc-00DnMh-Rp; Tue, 17 May 2022 13:07:57 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nqwmf-00DjG8-5T for linux-arm-kernel@lists.infradead.org; Tue, 17 May 2022 12:58:43 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1652792320; x=1684328320; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=k/eXXvyIz1G2bo/uK4pQ9GdcfANrco7l6szUxhcJ9g8=; b=TmEWssR8m4vArifPepGVtgS2VXmRU7EFY8bk17Hjk3WxmUF9Rqq1lwPj LpSNbx7rPwfB8vvj7It92vK92lNp5ilMmlIpQ8wjUlgB7H4ZMgWQetZUd duH/XaF8QPb8YgGtcVtBs2FLytUSSGEORcCsMYGwXg5Yiq8ttKw/gWhCb saiGq5VNX2TDSm3+P9zE3EmScJ899D/DxSEhz6zBnnLwjbDl9gVDK9VCA FcL5gPXgo1HJHcbeibCmjvp+Zc2L7HkHLxy5wDnScXF8dOIY5h12S1AqE uhpTTuH8BHFTjYnB/rAg6NUQDarjD/gdzeiQMOXjHHMgOKWty8zlwxyQv g==; X-IronPort-AV: E=Sophos;i="5.91,232,1647327600"; d="scan'208";a="96128625" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 17 May 2022 05:58:34 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Tue, 17 May 2022 05:58:34 -0700 Received: from ROB-ULT-M18063.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Tue, 17 May 2022 05:58:32 -0700 From: Claudiu Beznea To: , , CC: , , , Claudiu Beznea Subject: [PATCH v2 0/2] nvmem: add Microchip OTP controller Date: Tue, 17 May 2022 15:58:20 +0300 Message-ID: <20220517125822.579580-1-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220517_055841_430718_38FB489B X-CRM114-Status: GOOD ( 10.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, This series adds support for Microchip OTP controller available on SAMA7G5. The driver gives access to a non-volatile memory which keeps (at the moment) information like booting media and temperature calibration data used for thermal measurements. Thank you, Claudiu Beznea Changes in v2: - updated the bindings (patch 1/2) as follows: - included the device name in files names and updated binding content accordingly - updated the description - removed address-cells, size-cells - removed clock include - use GPL-2.0 OR BSD-2-Clause license - removed OTP_PKT_SAMA7G5_TEMP_CALIB_LEN and keep hardcoded value in examples - updated MAINTAINERS file with new naming of bindings Claudiu Beznea (2): dt-bindings: microchip-otpc: document Microchip OTPC nvmem: microchip-otpc: add support .../nvmem/microchip-sama7g5,otpc.yaml | 50 +++ MAINTAINERS | 8 + drivers/nvmem/Kconfig | 7 + drivers/nvmem/Makefile | 2 + drivers/nvmem/microchip-otpc.c | 288 ++++++++++++++++++ .../nvmem/microchip-sama7g5,otpc.h | 12 + 6 files changed, 367 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/microchip-sama7g5,otpc.yaml create mode 100644 drivers/nvmem/microchip-otpc.c create mode 040000 include/dt-bindings/nvmem create mode 100644 include/dt-bindings/nvmem/microchip-sama7g5,otpc.h