| Message ID | 20220519125527.18544-1-rex-bc.chen@mediatek.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Cleanup MediaTek clk reset drivers and support SoCs | expand |
On Thu, May 19, 2022 at 08:55:08PM +0800, Rex-BC Chen wrote: > In this series, we cleanup MediaTek clock reset drivers in clk/mediatek > folder. MediaTek clock reset driver is used to provide reset control > of modules controlled in clk, like infra_ao. > > Changes for v7: > 1. v7 is based on linux-next next-20220519 and Chen-Yu's series[1]. > 2. Add support for MT8186. > > [1]: https://patchwork.kernel.org/project/linux-mediatek/list/?series=643003 > > Changes for v6: > 1. Add a new patch to support inuput argument index mode. > 2. Revise definition in reset.h to index. > > Rex-BC Chen (19): > clk: mediatek: reset: Add reset.h > clk: mediatek: reset: Fix written reset bit offset > clk: mediatek: reset: Refine and reorder functions in reset.c > clk: mediatek: reset: Extract common drivers to update function > clk: mediatek: reset: Merge and revise reset register function > clk: mediatek: reset: Revise structure to control reset register > clk: mediatek: reset: Support nonsequence base offsets of reset > registers > clk: mediatek: reset: Support inuput argument index mode > clk: mediatek: reset: Change return type for clock reset register > function > clk: mediatek: reset: Add new register reset function with device > clk: mediatek: reset: Add reset support for simple probe > dt-bindings: arm: mediatek: Add #reset-cells property for > MT8192/MT8195 > dt-bindings: reset: mediatek: Add infra_ao reset index for > MT8192/MT8195 > clk: mediatek: reset: Add infra_ao reset support for MT8192/MT8195 > arm64: dts: mediatek: Add infra #reset-cells property for MT8192 > arm64: dts: mediatek: Add infra #reset-cells property for MT8195 > dt-bindings: reset: mediatek: Add infra_ao reset index for MT8186 > dt-bindings: arm: mediatek: Add #reset-cells property for MT8186 > clk: mediatek: reset: Add infra_ao reset support for MT8186 For the whole series: Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> And also Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> on mt8192-asurada-spherion. PCIe resets work as intended by adding on the pcie node + resets = <&infracfg MT8192_INFRA_RST2_PEXTP_PHY_SWRST>, + <&infracfg MT8192_INFRA_RST4_PCIE_TOP_SWRST>; + reset-names = "phy", "mac"; Thanks for the great work on this series, Rex! Nícolas
On Fri, 2022-05-20 at 11:40 -0400, Nícolas F. R. A. Prado wrote: > On Thu, May 19, 2022 at 08:55:08PM +0800, Rex-BC Chen wrote: > > In this series, we cleanup MediaTek clock reset drivers in > > clk/mediatek > > folder. MediaTek clock reset driver is used to provide reset > > control > > of modules controlled in clk, like infra_ao. > > > > Changes for v7: > > 1. v7 is based on linux-next next-20220519 and Chen-Yu's series[1]. > > 2. Add support for MT8186. > > > > [1]: > > https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=643003__;!!CTRNKA9wMg0ARbw!3N_R1R2qXYd-vLUE-Bzrc1ZD_39liFO6Vz_RyJdPiuAyoMHO4TuaoOwWk1ka50bVe_0fdyJakB-FzCLGjzdVtsd6sQ$ > > > > > > Changes for v6: > > 1. Add a new patch to support inuput argument index mode. > > 2. Revise definition in reset.h to index. > > > > Rex-BC Chen (19): > > clk: mediatek: reset: Add reset.h > > clk: mediatek: reset: Fix written reset bit offset > > clk: mediatek: reset: Refine and reorder functions in reset.c > > clk: mediatek: reset: Extract common drivers to update function > > clk: mediatek: reset: Merge and revise reset register function > > clk: mediatek: reset: Revise structure to control reset register > > clk: mediatek: reset: Support nonsequence base offsets of reset > > registers > > clk: mediatek: reset: Support inuput argument index mode > > clk: mediatek: reset: Change return type for clock reset register > > function > > clk: mediatek: reset: Add new register reset function with device > > clk: mediatek: reset: Add reset support for simple probe > > dt-bindings: arm: mediatek: Add #reset-cells property for > > MT8192/MT8195 > > dt-bindings: reset: mediatek: Add infra_ao reset index for > > MT8192/MT8195 > > clk: mediatek: reset: Add infra_ao reset support for > > MT8192/MT8195 > > arm64: dts: mediatek: Add infra #reset-cells property for MT8192 > > arm64: dts: mediatek: Add infra #reset-cells property for MT8195 > > dt-bindings: reset: mediatek: Add infra_ao reset index for MT8186 > > dt-bindings: arm: mediatek: Add #reset-cells property for MT8186 > > clk: mediatek: reset: Add infra_ao reset support for MT8186 > > For the whole series: > > Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> > > And also > > Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> > > on mt8192-asurada-spherion. PCIe resets work as intended by adding on > the pcie > node > > + resets = <&infracfg > MT8192_INFRA_RST2_PEXTP_PHY_SWRST>, > + <&infracfg > MT8192_INFRA_RST4_PCIE_TOP_SWRST>; > + reset-names = "phy", "mac"; > > Thanks for the great work on this series, Rex! > > Nícolas Hello Nícolas, Thanks for helping me to test this series in MT8192. BRs, Rex
In this series, we cleanup MediaTek clock reset drivers in clk/mediatek folder. MediaTek clock reset driver is used to provide reset control of modules controlled in clk, like infra_ao. Changes for v7: 1. v7 is based on linux-next next-20220519 and Chen-Yu's series[1]. 2. Add support for MT8186. [1]: https://patchwork.kernel.org/project/linux-mediatek/list/?series=643003 Changes for v6: 1. Add a new patch to support inuput argument index mode. 2. Revise definition in reset.h to index. Rex-BC Chen (19): clk: mediatek: reset: Add reset.h clk: mediatek: reset: Fix written reset bit offset clk: mediatek: reset: Refine and reorder functions in reset.c clk: mediatek: reset: Extract common drivers to update function clk: mediatek: reset: Merge and revise reset register function clk: mediatek: reset: Revise structure to control reset register clk: mediatek: reset: Support nonsequence base offsets of reset registers clk: mediatek: reset: Support inuput argument index mode clk: mediatek: reset: Change return type for clock reset register function clk: mediatek: reset: Add new register reset function with device clk: mediatek: reset: Add reset support for simple probe dt-bindings: arm: mediatek: Add #reset-cells property for MT8192/MT8195 dt-bindings: reset: mediatek: Add infra_ao reset index for MT8192/MT8195 clk: mediatek: reset: Add infra_ao reset support for MT8192/MT8195 arm64: dts: mediatek: Add infra #reset-cells property for MT8192 arm64: dts: mediatek: Add infra #reset-cells property for MT8195 dt-bindings: reset: mediatek: Add infra_ao reset index for MT8186 dt-bindings: arm: mediatek: Add #reset-cells property for MT8186 clk: mediatek: reset: Add infra_ao reset support for MT8186 .../mediatek/mediatek,mt8186-sys-clock.yaml | 3 + .../mediatek/mediatek,mt8192-sys-clock.yaml | 3 + .../mediatek/mediatek,mt8195-sys-clock.yaml | 3 + arch/arm64/boot/dts/mediatek/mt8192.dtsi | 1 + arch/arm64/boot/dts/mediatek/mt8195.dtsi | 13 +- drivers/clk/mediatek/clk-mt2701-eth.c | 10 +- drivers/clk/mediatek/clk-mt2701-g3d.c | 10 +- drivers/clk/mediatek/clk-mt2701-hif.c | 10 +- drivers/clk/mediatek/clk-mt2701.c | 22 +- drivers/clk/mediatek/clk-mt2712.c | 22 +- drivers/clk/mediatek/clk-mt7622-eth.c | 10 +- drivers/clk/mediatek/clk-mt7622-hif.c | 12 +- drivers/clk/mediatek/clk-mt7622.c | 22 +- drivers/clk/mediatek/clk-mt7629-eth.c | 10 +- drivers/clk/mediatek/clk-mt7629-hif.c | 12 +- drivers/clk/mediatek/clk-mt8135.c | 22 +- drivers/clk/mediatek/clk-mt8173.c | 22 +- drivers/clk/mediatek/clk-mt8183.c | 18 +- drivers/clk/mediatek/clk-mt8186-infra_ao.c | 23 ++ drivers/clk/mediatek/clk-mt8192.c | 29 +++ drivers/clk/mediatek/clk-mt8195-infra_ao.c | 24 +++ drivers/clk/mediatek/clk-mtk.c | 7 + drivers/clk/mediatek/clk-mtk.h | 9 +- drivers/clk/mediatek/reset.c | 198 +++++++++++++----- drivers/clk/mediatek/reset.h | 82 ++++++++ include/dt-bindings/reset/mt8186-resets.h | 5 + include/dt-bindings/reset/mt8192-resets.h | 8 + include/dt-bindings/reset/mt8195-resets.h | 6 + 28 files changed, 522 insertions(+), 94 deletions(-) create mode 100644 drivers/clk/mediatek/reset.h