From patchwork Fri Jun 10 09:24:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12877132 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3C89CC43334 for ; Fri, 10 Jun 2022 09:23:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=Oawdywrj16dYAnL6s2pL0O9sFBUDSqtkBsJ8rDe59ro=; b=n9ikC8Oxnqi2Fx /ZqlHomWYe5dRqeBLDkpr+FOqAg9Y955cRfjDmSYhDvCYCwZENl8Ql9eNaMi+Lr3nKJuxJ/Jj9NSz uWuBgjbm9XaSIL91CqWSKYvRhEtVE887rkyrUZGsASjaWZgCHbMJgJ0cNTPez/vyrMbfrlYun+N+4 ayZk+8FDt5mVYtYlQYPuY8Mpdfylcqi7probvmK7h1YaI9E7+meusGHizEuMZNspQiL2V6wzCHkX8 A/5EXyoo2/2aWh0afnOm6RikkyzpJfjf1iXHnscF712EakuOAE0mAS6hUPM1sHgIaYSfia0I+Wlv3 OnkBmZ/CAWqYkRj87Wxg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nzaqb-0076xt-IW; Fri, 10 Jun 2022 09:22:29 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nzaqV-0076tF-Rq for linux-arm-kernel@lists.infradead.org; Fri, 10 Jun 2022 09:22:26 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1654852943; x=1686388943; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=5aas3JDyd+r0RGlKzY7C5hd/x9F/tr7ozec8/31OfSg=; b=v4XPP7zD9iQoEOwOROf6mx48ypJbD4oiwgSrEUO9cj6rYCrRYzrmtQVC HoB0Ej4yk5GYAxum3Q5SpnTFBnMvst+K1SqUCkbnqiuNIRL/xCcnTcfLE fdAtAByYWbd2KY78A6fjYbATlmbf2CX3ny2IbBrJrWLotEW9w0Y+pA71N ZH0gxig95DRbki1k19GPzgeD6xIMT5CdNNdFAvQMlBr8ijdlO1t6o8kZV Cb6MbvjzRY1oHbG5lc6ynapVtCaK0YTcp8sSDDouRv94nvzsKL9fQ6qTr UwgEUCmpadXxaAPK/u+Qr6LrQTeln3gxE0LsRSJmcpR8CMaAw6Dy4FUSy A==; X-IronPort-AV: E=Sophos;i="5.91,288,1647327600"; d="scan'208";a="162767360" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 10 Jun 2022 02:22:15 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Fri, 10 Jun 2022 02:22:15 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Fri, 10 Jun 2022 02:22:11 -0700 From: Claudiu Beznea To: , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v5 0/9] power: reset: at91-reset: add support for sama7g5 Date: Fri, 10 Jun 2022 12:24:05 +0300 Message-ID: <20220610092414.1816571-1-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220610_022224_044610_C0186122 X-CRM114-Status: GOOD ( 12.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, The series adds reset controller support for SAMA7G5 SoCs. Compared with previous version the reset controller embedded on SAMA7G5 is able to reset individual on SoC devices (e.g. USB PHY controllers). Among with this I took the change and converted reset controller bindings to YAML (patch 2/9) and adapt reset controller nodes in device tree files to comply with DT specifications (patch 1/9). Thank you, Claudiu Beznea Changes in v5: - in patch 6/9 added device_reset_min_id, device_reset_max_id to struct at91_reset_data; these will be used in at91_reset_of_xlate() (patch 7/9) allowing expansion of device reset code for future devices; with this member of type const struct at91_reset_data * has been added to struct at91_reset and at91_rcdev_init() gets now only 2 arguments. - in patch 8/9 use filled .device_reset_min_id, .device_reset_max_id - in patch 6/9 use device_get_match_data() - collected tags Changes in v4: - removed patch 10/10 from v3 as it has been taken though at91 tree Changes in v3: - use spin_lock_irqsave()/spin_unlock_irqrestore() and lock only on update path - collected tags Changes in v2: - added patches 5/10 and 10/10 - in patch 2/10 use my microchip email address - in patch 4/10 added "SAMA7G5_" in front of macros to cope with file naming and used (GPL-2.0-only OR BSD-2-Clause) - in patch 6/10 documented the structure's members - in patch 7/10: - protect access to reset->dev_base with spin lock - check for valid values of reset_spec->args[0] in at91_reset_of_xlate() - s/if (IS_ERR(reset->rstc_base))/if (IS_ERR(reset->dev_base)) - include dt-bindings/reset/sama7g5-reset.h - document new added structure's members - collected tags Claudiu Beznea (9): ARM: dts: at91: use generic name for reset controller dt-bindings: reset: convert Atmel/Microchip reset controller to YAML dt-bindings: reset: atmel,at91sam9260-reset: add sama7g5 bindings dt-bindings: reset: add sama7g5 definitions power: reset: at91-reset: document structures and enums power: reset: at91-reset: add at91_reset_data power: reset: at91-reset: add reset_controller_dev support power: reset: at91-reset: add support for SAMA7G5 ARM: dts: at91: sama7g5: add reset-controller node .../devicetree/bindings/arm/atmel-sysregs.txt | 15 -- .../reset/atmel,at91sam9260-reset.yaml | 68 +++++++ arch/arm/boot/dts/at91sam9260.dtsi | 2 +- arch/arm/boot/dts/at91sam9261.dtsi | 2 +- arch/arm/boot/dts/at91sam9263.dtsi | 2 +- arch/arm/boot/dts/at91sam9g45.dtsi | 2 +- arch/arm/boot/dts/at91sam9n12.dtsi | 2 +- arch/arm/boot/dts/at91sam9rl.dtsi | 2 +- arch/arm/boot/dts/at91sam9x5.dtsi | 2 +- arch/arm/boot/dts/sam9x60.dtsi | 2 +- arch/arm/boot/dts/sama5d2.dtsi | 2 +- arch/arm/boot/dts/sama5d3.dtsi | 2 +- arch/arm/boot/dts/sama5d4.dtsi | 2 +- arch/arm/boot/dts/sama7g5.dtsi | 7 + drivers/power/reset/at91-reset.c | 184 ++++++++++++++++-- include/dt-bindings/reset/sama7g5-reset.h | 10 + 16 files changed, 265 insertions(+), 41 deletions(-) create mode 100644 Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml create mode 100644 include/dt-bindings/reset/sama7g5-reset.h Signed-off-by: Sebastian Reichel