[v3,0/2] MediaTek Kompanio 1200 MT8195 - DisplayPort clocks fixes

Message

AngeloGioacchino Del Regno June 17, 2022, 11:12 a.m. UTC

This series fixes the two DPINTF clocks to propagate rate change
requests to their own parent (and also fixes vdo1_dpintf's parent name).

This is needed in order to stay clean in the DisplayPort driver and
avoid adding (now useless) custom handling of clocks reparenting based
on the wanted final clock rate.

Changes in v3:
 - Fixed tags ordering.

AngeloGioacchino Del Regno (2):
  clk: mediatek: clk-mt8195-vdo0: Set rate on vdo0_dp_intf0_dp_intf's
    parent
  clk: mediatek: clk-mt8195-vdo1: Reparent and set rate on vdo1_dpintf's
    parent

 drivers/clk/mediatek/clk-mt8195-vdo0.c | 7 ++++++-
 drivers/clk/mediatek/clk-mt8195-vdo1.c | 6 +++++-
 2 files changed, 11 insertions(+), 2 deletions(-)

Comments

AngeloGioacchino Del Regno July 15, 2022, 10:57 a.m. UTC | #1

Il 17/06/22 13:12, AngeloGioacchino Del Regno ha scritto:
> This series fixes the two DPINTF clocks to propagate rate change
> requests to their own parent (and also fixes vdo1_dpintf's parent name).
> 
> This is needed in order to stay clean in the DisplayPort driver and
> avoid adding (now useless) custom handling of clocks reparenting based
> on the wanted final clock rate.
> 
> Changes in v3:
>   - Fixed tags ordering.
> 
> AngeloGioacchino Del Regno (2):
>    clk: mediatek: clk-mt8195-vdo0: Set rate on vdo0_dp_intf0_dp_intf's
>      parent
>    clk: mediatek: clk-mt8195-vdo1: Reparent and set rate on vdo1_dpintf's
>      parent
> 
>   drivers/clk/mediatek/clk-mt8195-vdo0.c | 7 ++++++-
>   drivers/clk/mediatek/clk-mt8195-vdo1.c | 6 +++++-
>   2 files changed, 11 insertions(+), 2 deletions(-)
> 

Gentle ping for this patch.

Without this one, DisplayPort (both DP and eDP) won't work on MT8195.

Thanks,
Angelo