From patchwork Tue Jun 21 06:37:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neal Liu X-Patchwork-Id: 12889150 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 667DAC43334 for ; Tue, 21 Jun 2022 12:15:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=mm8HCML9KF146i5TLKL7dGJ02rUWmhQBXw4Vh5M1THY=; b=vBxEZHbcgHm8hV oZTQiGSISRTWizsTCGkcN0/GWV0iWBVTcM1QBRQ5TUT6cRDjldEEulh3omt6FbOwtBGZT5h9rJSbz qICVfBbwWt6ndcPAuS49/pwdCOgLapbk9fcTQVwvZlL+GDIc51zenbzPDOqcNMyCfjm45AcFtwTRD 5uIyjQUJwxTgNxWQ1B5dTFv7PkVah68JiDFaMtTsSFrk+paCxz5M1Q/IckUtlzsDjRNV4MyfBweCr uNQy0zichQMZXDxrEWL9ZZPuv61UPHn4G60DYrE6STXkFE2s/1jPoGk8bkR8pWUsofBY4SLagug98 j6Fb3B35J4rnmlepvL+w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o3clj-005Fz4-OF; Tue, 21 Jun 2022 12:14:07 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o3ckM-005F8e-89 for linux-arm-kernel@bombadil.infradead.org; Tue, 21 Jun 2022 12:12:42 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Content-Type:Content-Transfer-Encoding: MIME-Version:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To:Content-ID: Content-Description:In-Reply-To:References; bh=ekT8vNanC1uyE42KGVsN15efXXxNAVHoi5MrIx6rXsw=; b=njaang9aRaS19sX3TFtuZgIBEl x5SlHQzwFxZBLnqgabrnYkz4gKRd36xbgAKorJRUZ+OmRN98QTVlb6xQ9XBJWF/c9zwzGmktCVMz4 vRmYQOPOrFh2FviHXK/DNd+j7y74YX3Upxwna+/ZEGv6Bzboq4NPQjowtVoyPPjUJbA7er5da+Xxn azk7rchte0nyAT7j3XLd0ZqFLXLAWGEUuA//NeAzCghvdrWIV13NMe46FXZGHyA92Nfeekb5EUmYl qYY4dTB/Sg/7gFX1LAuYyMsNKiY4cAHhIY3i4kK/OF4JlLbXAwDFyBav0B1UfsAS6GOxZvIdUkRkx X9x7+KNw==; Received: from twspam01.aspeedtech.com ([211.20.114.71]) by casper.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o3XYk-005sM8-9w for linux-arm-kernel@lists.infradead.org; Tue, 21 Jun 2022 06:40:24 +0000 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 25L6MMZV031703; Tue, 21 Jun 2022 14:22:22 +0800 (GMT-8) (envelope-from neal_liu@aspeedtech.com) Received: from localhost.localdomain (192.168.10.10) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 21 Jun 2022 14:37:57 +0800 From: Neal Liu To: Corentin Labbe , Christophe JAILLET , Randy Dunlap , Herbert Xu , "David S . Miller" , Rob Herring , Krzysztof Kozlowski , Joel Stanley , "Andrew Jeffery" , Dhananjay Phadke , "Johnny Huang" CC: , , , , , Subject: [PATCH v3 0/5] Add Aspeed crypto driver for hardware acceleration Date: Tue, 21 Jun 2022 14:37:47 +0800 Message-ID: <20220621063752.1005781-1-neal_liu@aspeedtech.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [192.168.10.10] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 25L6MMZV031703 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220621_074022_925004_1EF6A781 X-CRM114-Status: GOOD ( 10.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Aspeed Hash and Crypto Engine (HACE) is designed to accelerate the throughput of hash data digest, encryption and decryption. These patches aim to add Aspeed hash & crypto driver support. The hash & crypto driver also pass the run-time self tests that take place at algorithm registration. Tested-by below configs: - CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set - CONFIG_CRYPTO_MANAGER_EXTRA_TESTS=y - CONFIG_DMA_API_DEBUG=y - CONFIG_DMA_API_DEBUG_SG=y - CONFIG_CPU_BIG_ENDIAN=y Change since v2: - Fix endianness issue. Tested on both little endian & big endian system. - Use common crypto hardware engine for enqueue & dequeue requests. - Use pre-defined IVs for SHA-family. - Revise error handler flow. - Fix sorts of coding style problems. Change since v1: - Add more error handlers, including DMA memory allocate/free, DMA map/unmap, clock enable/disable, etc. - Fix check dma_map error for config DMA_API_DEBUG. - Fix dt-binding doc & dts node naming. Neal Liu (5): crypto: aspeed: Add HACE hash driver dt-bindings: clock: Add AST2600 HACE reset definition ARM: dts: aspeed: Add HACE device controller node dt-bindings: crypto: add documentation for aspeed hace crypto: aspeed: add HACE crypto driver .../bindings/crypto/aspeed,ast2500-hace.yaml | 53 + MAINTAINERS | 7 + arch/arm/boot/dts/aspeed-g6.dtsi | 8 + drivers/crypto/Kconfig | 1 + drivers/crypto/Makefile | 1 + drivers/crypto/aspeed/Kconfig | 40 + drivers/crypto/aspeed/Makefile | 8 + drivers/crypto/aspeed/aspeed-hace-crypto.c | 1041 ++++++++++++ drivers/crypto/aspeed/aspeed-hace-hash.c | 1423 +++++++++++++++++ drivers/crypto/aspeed/aspeed-hace.c | 320 ++++ drivers/crypto/aspeed/aspeed-hace.h | 289 ++++ include/dt-bindings/clock/ast2600-clock.h | 1 + 12 files changed, 3192 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml create mode 100644 drivers/crypto/aspeed/Kconfig create mode 100644 drivers/crypto/aspeed/Makefile create mode 100644 drivers/crypto/aspeed/aspeed-hace-crypto.c create mode 100644 drivers/crypto/aspeed/aspeed-hace-hash.c create mode 100644 drivers/crypto/aspeed/aspeed-hace.c create mode 100644 drivers/crypto/aspeed/aspeed-hace.h