From patchwork Thu Jun 30 14:42:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 12901946 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0A828C43334 for ; Thu, 30 Jun 2022 14:43:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=p5LkrTIRlpL1xl7crmkYDTwAAneFZ3e8eNgZBzU+mkk=; b=xqsMCJmzj47WTP Jj+QPTswlDeSYSuFP+Y7EDfAmqjAPBg5PLKowy/W1EH1nomn/Io5TuyPJVJT4i/CYPc43PP7enJc3 a3enVW3yINNeHOJ0XBlmHusU/J7iASS2HB2f9P5oH6G3+JBoGb6PSCdquO3AvdBrmyYdKOQ9JRiGS SEZtfel9GvxpUmaNaYwwazEjJJqvx61zFbihTvF6QL+1w0ia51ZTEQ1gkgUAnrxYeL8zpi4QjL6ZR 6PtfRLHe/92ro85KCYzZIeZ2YmWnlxoOUQHowyW3rWLF0cQ2VDv7w+pBXxqDu2tR0tVdQ82rK4D/s Z3AabAoA4YYQrz5DW2tg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6vNR-0007fB-EA; Thu, 30 Jun 2022 14:42:41 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6vNO-0007dD-8s for linux-arm-kernel@lists.infradead.org; Thu, 30 Jun 2022 14:42:40 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id A132BB82B67; Thu, 30 Jun 2022 14:42:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D4A76C34115; Thu, 30 Jun 2022 14:42:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656600155; bh=ldLNMNqagbE0ZwlqpMyvutAshCQhMTdTBMzn6o3X6S0=; h=From:To:Cc:Subject:Date:From; b=Y8KDPFX4wElDCYgmqV3TP3wgk2selsl4qdec1Ev+hyVp3N073ZbxOJkIjSTLmf6nw RmwQrRQPTIbZ9vvfXEp2FaqLdtYS5wrE/6XOKQX7c/e70HyunxSjulTtfJxIUeWCkn 58iXfxHwhVj4XHWThMj2YoAhQITX9GXEh6UF1vCNKC67tQXlJ64gIP8eKDroXW3p33 bqIQjiExWHh6r01juabshAXL6HPkL5KZSvXFUDhAToBQyRAOhmv5shjgrvGPq7nqv6 LvjKZ5PkE1kgPbwMEDmW0dwABgDLqrD0z5ACQkeqVssjCx6EfU5bTTFAD+Hgapt9Yl b8va31l++fF/g== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: Ard Biesheuvel , Will Deacon , Marc Zyngier , =?utf-8?q?Pierre-Cl=C3=A9ment_Tosi?= , Quentin Perret , Mark Rutland Subject: [PATCH 0/6] arm64: efi: boot with MMU and caches on if possible Date: Thu, 30 Jun 2022 16:42:24 +0200 Message-Id: <20220630144230.2332555-1-ardb@kernel.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2411; h=from:subject; bh=ldLNMNqagbE0ZwlqpMyvutAshCQhMTdTBMzn6o3X6S0=; b=owEB7QES/pANAwAKAcNPIjmS2Y8kAcsmYgBivbZJJ2vFuMwh8Djsfpsm7A7TUfwDWlUbNqVLKA63 KxrEQmiJAbMEAAEKAB0WIQT72WJ8QGnJQhU3VynDTyI5ktmPJAUCYr22SQAKCRDDTyI5ktmPJEPPC/ 4paTw8uGbcKspV3pYbjZP2vOLNe5sHmHl9KzYICPxihvoVssB0Z7KNOEwiVm7MNOFaPaSswC0S2Kx+ Z+uMTyW0Ifl7+LVbWZhEk7uU+Jf0lj9Tv3UosmjcmlJotuDmV2RHyx6CuMG/tD4MsqESvadj73hlD7 CFaqgXSfw/8cQlvgMwzh49yu0RZ1rgMAvDe5i0k/LQqTPwcUhz5nzN2QqCwykDCIu2CTasbnLpcCAq 2O8/lBcIBNwNcuVXl2hCN/aKoLpflLKZ7BB3LiljO73JkMAXBYBaD9Y9GBJsBPktJ6lYblo7RoxWxR s6rK3q4RWrVOYVrd2yJE19MITbxNfyANc0lLrz/+zsUVIVqPO0nS+Z6SJFxSZu8qoKRU4qjhXjRJ7Y lS5vp7+QXxnEako9ZJkVmrEIGf5FBQ9uoCBFlb98WPCoppGv80EwYQRJDARED2yIcQya0r/r3a3130 9T4duyUbbp1JC3v8GovFWtgb49O/QrOdL3KkpmXygo5cc= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220630_074238_652754_0C434A9D X-CRM114-Status: GOOD ( 16.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This small series is what remains now that much of the prerequisite changes that are shared with other work have landed. This is a follow-up to [0], and implements the necessary changes that allow the EFI stub to enter the kernel proper with MMU and caches enabled. This is possible because the EFI spec mandates that all of memory is mapped, and so we can rely on this mapping to set up the initial ID map, instead of taking down the MMU first, and populating those page tables using non-cacheable accesses that require special care in terms of cache coherency. This also means that there is no need to clean the executable image to the point of coherency (with the exception of the contents of .idmap.text, which contains the code that switches from the firmware's ID map to the kernel one) Given that the image will typically be mapped by the firmware according to the section descriptors in the PE/COFF header (R-X for .text and .rodata, RW- for .data and .bss), this also has a slight robustness advantage. Note that this does not update the documented boot protocol [yet], although any loader could take advantage of this, and load the kernel image at any 64k aligned physical offset, and enter the image with the MMU still enabled, either at EL2 or EL1. [0] https://lore.kernel.org/linux-arm-kernel/20220330154205.2483167-1-ardb@kernel.org/ Cc: Will Deacon Cc: Marc Zyngier Cc: Pierre-Clément Tosi Cc: Quentin Perret Cc: Mark Rutland Ard Biesheuvel (6): arm64: lds: reduce effective minimum image alignment to 64k arm64: kernel: move ID map out of .text mapping arm64: head: record the MMU state at primary entry arm64: head: avoid cache invalidation when entering with the MMU on arm64: head: clean the ID map page to the PoC arm64: efi/libstub: enter with the MMU on if executing in place arch/arm64/include/asm/efi.h | 7 --- arch/arm64/kernel/efi-entry.S | 4 ++ arch/arm64/kernel/head.S | 45 ++++++++++++++++++-- arch/arm64/kernel/vmlinux.lds.S | 13 +++++- arch/arm64/mm/proc.S | 2 - drivers/firmware/efi/libstub/arm64-stub.c | 2 +- include/linux/efi.h | 6 +-- 7 files changed, 58 insertions(+), 21 deletions(-)