From patchwork Fri Jul 15 17:51:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12919549 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D6B9FC433EF for ; Fri, 15 Jul 2022 17:55:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=80Lk1iJT3VBK4/fH6KYWCW0NHWS0rxa5IBGaa0N7kAA=; b=KXeS6QZZVIDyGQ XPrXRqpQikM2UC/iUx/4aNNvK2Bcnhj4PecBH4BMgiJ1EPEgAHrbTYOVK23A82hk9/kD+08/2l2gs ZMURK7vkFw/KWUqj/RdJfPo+KYABiEIH+/IoZXPuxFloufs2FNklu1aoRtdcxRPfNx4KFLwM7RTX9 bQ2dZ36RdEh+24EKjxGgXJHikjm3QCF+MWuhJzGfrJkeBL5frXA9x+LbrHO6oCTXZB+BPn7yrU5Rj DYOtf5n5Ya+jQfBrnb7rBKjhms9cSP1+0Gj56RW8FQ8doN5N3JGGjD06Z7P26HTqwPjwp0foAqIZb t35/iVDkP3aDx4QLmr7Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oCPVa-009HyH-GQ; Fri, 15 Jul 2022 17:53:46 +0000 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oCPVV-009Hw3-Mq for linux-arm-kernel@lists.infradead.org; Fri, 15 Jul 2022 17:53:43 +0000 Received: by mail-wr1-x434.google.com with SMTP id b26so7743461wrc.2 for ; Fri, 15 Jul 2022 10:53:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=conchuod.ie; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=H7FdqtQskr0feGEMESNye0rnehyoWZm9I2IR2qQbWhw=; b=JXY9tG2WRrIfIGRKFohwcnYsUQVcSdNBZ0QIGMlDIRqOWRYIzyrwhMfXSxiZolGhlz UWrxE1UeKpDBH5S9j/w3Oe0wOc0gaEMnZoj8v6PyId4PI0r0rxgKn5Tztce2L/BFxYIl MBrrLnvciZ/KnPWkPpgpubUUVfrvJA2VXNl1ur33S/pN3jhfrvHYwkLphcBcOzXm5UOB kbQeKNF63/K44eKvMFOwEhd1+uvrrkhzcGjfSf8Gk2QY7QPBm+WPHbyAAfSCMS+eCOiW swSCRO0Fu0G0IgVCoEP3escuvfEGpga6GeL3RBEFg1OGRftF39s4qfhdXMgBJ3AAxocU dLrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=H7FdqtQskr0feGEMESNye0rnehyoWZm9I2IR2qQbWhw=; b=3kiVgK+GmmWt02+k1HPm+gAwP9wdTQKZAaFVWm6BvjpB3FS8FQGBlzzKyBCLuyHKmR PCkO/sEx5oppfaeuDthja5EHDiBPiiRG53V3BpsHhl3dFqp2do0eUz45gQ2C0/+ENK08 dLV1iusIdeZO0VAtFcERAf4+txiwlHP3I8Fl7cUNSmYE5go5RJNevqQxMbjqpanlVTgs WN/68jG5mVLV77K5YjPx1dIhL9h5u4yOdSoNFPzyQOwv+pxLgVX+80SB2d+iDzxDlW6G EXkbijq/NjdRfHTMht/RgURX3Ad4NZJc/gyhHDOQE9DiiU+xJMrvB1BpGdLnRazG4Ux9 c4hw== X-Gm-Message-State: AJIora/r00yE6k9r+TdytqfJ1EYRP7lYy7SdnM6ez/fSWLqJW3K/zw3x z92cE8ZONdPMlD6SoOul2n/LKA== X-Google-Smtp-Source: AGRyM1vAaj7pVFqqnelORFYKWYhdT3B3rL63PBVd14yEq7ucjnt/2MVUoT9Qyfj1fcyeS3ao5/kSog== X-Received: by 2002:a5d:6c63:0:b0:21d:bf45:f90f with SMTP id r3-20020a5d6c63000000b0021dbf45f90fmr11182223wrz.715.1657907618412; Fri, 15 Jul 2022 10:53:38 -0700 (PDT) Received: from henark71.. ([51.37.234.167]) by smtp.gmail.com with ESMTPSA id n9-20020a5d4c49000000b002167efdd549sm4364131wrt.38.2022.07.15.10.53.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Jul 2022 10:53:37 -0700 (PDT) From: Conor Dooley To: Paul Walmsley , Palmer Dabbelt , Palmer Dabbelt , Albert Ou , Sudeep Holla , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , "Rafael J . Wysocki" Cc: Daire McNamara , Conor Dooley , Niklas Cassel , Damien Le Moal , Geert Uytterhoeven , Zong Li , Emil Renner Berthing , Jonas Hahnfeld , Guo Ren , Anup Patel , Atish Patra , Heiko Stuebner , Philipp Tomsich , Rob Herring , Marc Zyngier , Viresh Kumar , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Brice Goglin Subject: [PATCH v4 0/2] Fix RISC-V's arch-topology reporting Date: Fri, 15 Jul 2022 18:51:54 +0100 Message-Id: <20220715175155.3567243-1-mail@conchuod.ie> X-Mailer: git-send-email 2.37.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220715_105341_756041_C304C930 X-CRM114-Status: GOOD ( 19.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Conor Dooley Hey all, It's my first time messing around with arch/ code at all, let alone more than one arch, so forgive me if I have screwed up how to do a migration like this. The goal here is the fix the incorrectly reported arch topology on RISC-V which seems to have been broken since it was added. cpu, package and thread IDs are all currently reported as -1, so tools like lstopo think systems have multiple threads on the same core when this is not true: https://github.com/open-mpi/hwloc/issues/536 arm64's topology code basically applies to RISC-V too, so it has been made generic along with the removal of MPIDR related code, which appears to be redudant code since '3102bc0e6ac7 ("arm64: topology: Stop using MPIDR for topology information")' replaced the code that actually interacted with MPIDR with default values. I only built tested for arm{,64} , so hopefully it is not broken when used. Testing on both arm64 & !SMP RISC-V would really be appreciated! For V2, I dropped the idea of doing a RISC-V specific implementation followed by a move to the generic code & just went for the more straight forward method of moving to the shared version first. I also dropped the RFC. V3 moves store_cpu_topology()'s definition down inside the arch check alongside the init function so that boot on 32bit arm is not broken. V4 has moved the RISC-V boot hart's call to store_cpu_topology() later into the boot process it is now right before SMP is brought up (or not in the case of !SMP). This prevents calling detect_cache_attributes() while we cannot allocate memory. V4 is also rebased on next-20220715 to get Sudeep's most recent arch_topology patchset. Thanks, Conor Conor Dooley (2): arm64: topology: move store_cpu_topology() to shared code riscv: topology: fix default topology reporting arch/arm64/kernel/topology.c | 40 ------------------------------------ arch/riscv/Kconfig | 2 +- arch/riscv/kernel/smpboot.c | 3 ++- drivers/base/arch_topology.c | 19 +++++++++++++++++ 4 files changed, 22 insertions(+), 42 deletions(-) base-commit: 6014cfa5bf32cf8c5c58b3cfd5ee0e1542c8a825 Tested-by: Atish Patra