From patchwork Tue Aug 30 09:55:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 12959033 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 61671ECAAA1 for ; Tue, 30 Aug 2022 09:59:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=+y20wCVtfji37C0Cm/G32dLZsjj/Aq9+mToG0aswn1A=; b=gTeQoPFv2u/dZ1 WNFQ4OsDu1YSAYhX0UdtbR+Px/Ns4o1M/4RlHgaVauSigQgtakWoQ0zRyYSZzzxAQFp2Ecof+Pe3T itExDxLZxaWD7hykLgWKDqrkZTwzpZu+n4ySLFGUX+w7v6MneRMz7l5po574Je/7hf8uaMLDkAQGO cO9j+mO0+phEHZIP5niXIkdtkWgA4H5mb5OKHP+ozi6c7MAanmFoPQY64XShUlhJ7InHvC5mYzZOr 3QGkWcfsuX0L1JModMbQFSvzVBHiO4CbwsL0VFH8NTvcMDb42QiLs4XVGmNOyWnPIsI0z23NyFfsO KLaoAyaOSR7RF1tlnwZQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oSy0Z-00FwwV-CC; Tue, 30 Aug 2022 09:58:11 +0000 Received: from relay8-d.mail.gandi.net ([217.70.183.201]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oSxyO-00Fvdw-QG for linux-arm-kernel@lists.infradead.org; Tue, 30 Aug 2022 09:56:08 +0000 Received: (Authenticated sender: maxime.chevallier@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 0847B1BF209; Tue, 30 Aug 2022 09:55:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1661853353; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=fNe7O3XpPrKWPRiBDZbqoQEmh7mC5aGWDTgnBM7l0Y4=; b=X2eVFd1qvXvmNmg0+jyQHr4YkkmSfTlnrgKIXOpOJB/PPGW4SWQ9TB5gJxjYAntLFQWIXF 49cRvnWRdg/WeH3pnthiGwuOhHqGHjTFj/+sMKXrpYXccAiONmldTIOEnr8I0AOKU5Pjom YFktlpPIZOO/8cJDutCi+tSMz2rnKtydUW4AckPeMqwpFZiQMsLp090DPj8uCBkOaY+J71 ceYhgbv8VQDTzyUiJ3inR/ezCuymXbgzHghEsonA99TS9an9jwCpmKV65aMV3WsKaY661x kj6VqQ2c2ox521TZ80+I4hbzz3DH2GhmL+fL2tKVAuznw6UqKIY9Ynh1wEInaA== From: Maxime Chevallier To: davem@davemloft.net, Rob Herring Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, thomas.petazzoni@bootlin.com, Andrew Lunn , Jakub Kicinski , Eric Dumazet , Paolo Abeni , Florian Fainelli , Heiner Kallweit , Russell King , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH net-next v2 0/5] net: altera: tse: phylink conversion Date: Tue, 30 Aug 2022 11:55:44 +0200 Message-Id: <20220830095549.120625-1-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220830_025601_638664_D8AAA8D2 X-CRM114-Status: GOOD ( 16.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is V2 of a series converting the Altera TSE driver to phylink, introducing a new PCS driver along the way. The Altera TSE can be built with a SGMII/1000BaseX PCS, allowing to use SFP ports with this MAC, which is the end goal of adding phylink support and a proper PCS driver. The PCS itself can either be mapped in the MAC's register space, in that case, it's accessed through 32 bits registers, with the higher 16 bits always 0. Alternatively, it can sit on its own register space, exposing 16 bits registers, some of which ressemble the standard PHY registers. To tackle that rework, several things needs updating, starting by the DT binding, since we add support for a new register range for the PCS. Hence, the first patch of the series is a conversion to YAML of the existing binding. Then, patch 2 does a bit of simple cleanup to the TSE driver, using nice reverse xmas tree definitions. Patch 3 adds the actual PCS driver, as a standalone driver. Some future series will then reuse that PCS driver from the dwmac-socfpga driver, which implements support for this exact PCS too, allowing to share the code nicely. Patch 4 is then a phylink conversion of the altera_tse driver, to use this new PCS driver. Finally, patch 5 updates the newly converted DT binding to support the pcs register range. This series contains bits and pieces for this conversion, please tell me if you want me to send it as individual patches. Thanks, Maxime V2 Changes : - Fixed the binding after the YAML conversion - Added a pcs_validate() callback - Introduced a comment to justify a soft reset for the PCS Maxime Chevallier (5): dt-bindings: net: Convert Altera TSE bindings to yaml net: altera: tse: cosmetic change to use reverse xmas tree ordering net: pcs: add new PCS driver for altera TSE PCS net: altera: tse: convert to phylink dt-bindings: net: altera: tse: add an optional pcs register range .../devicetree/bindings/net/altera_tse.txt | 113 ----- .../devicetree/bindings/net/altr,tse.yaml | 183 +++++++ MAINTAINERS | 7 + drivers/net/ethernet/altera/Kconfig | 2 + drivers/net/ethernet/altera/altera_tse.h | 19 +- .../net/ethernet/altera/altera_tse_ethtool.c | 22 +- drivers/net/ethernet/altera/altera_tse_main.c | 453 +++++------------- drivers/net/pcs/Kconfig | 6 + drivers/net/pcs/Makefile | 1 + drivers/net/pcs/pcs-altera-tse.c | 171 +++++++ include/linux/pcs-altera-tse.h | 17 + 11 files changed, 547 insertions(+), 447 deletions(-) delete mode 100644 Documentation/devicetree/bindings/net/altera_tse.txt create mode 100644 Documentation/devicetree/bindings/net/altr,tse.yaml create mode 100644 drivers/net/pcs/pcs-altera-tse.c create mode 100644 include/linux/pcs-altera-tse.h